Datasheet

Signal description M93S46-W M93S56-W M93S66-W
8/37 DocID5124 Rev 6
2 Signal description
During all operations, V
CC
must be held stable and within the specified valid range:
V
CC
(min) to V
CC
(max).
All of the input and output signals can be held high or low (according to voltages of V
IL
, V
IH
,
V
OL
or V
OH
, as specified in Table 10: DC Characteristics (M93Sx6-W, device grade 6).
These signals are described next.
2.1 Serial data output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
rising edge of Serial Clock (C).
2.2 Serial data input (D)
This input signal is used to transfer data serially into the device. It receives instructions,
addresses, and the data to be written. Values are latched on the rising edge of Serial Clock
(C).
2.3 Serial clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data
present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on
Serial Data Output (Q) changes after the rising edge of Serial Clock (C).
2.4 Chip select (S)
When this input signal is low, the device is deselected and Serial Data Output (Q) is at high
impedance. Unless an internal Write cycle is in progress, the device will be in the Standby
Power mode. Driving Chip Select (S) high selects the device, placing it in the Active Power
mode.
2.5 Protection register (PRE)
The Protection enable (PRE) signal must be driven High before and during the instructions
accessing the Protection Register.
2.6 Write protect (W)
This input signal is used to control the memory in write protected mode. When Write Protect
(W) is held low, writes to the memory are disabled, but other operations remain enabled.
Write Protect (W) must either be driven high or low, but must not be left floating.