Datasheet

Operation modes M48Z08, M48Z18
8/20 Doc ID 2424 Rev 8
Figure 4. READ mode AC waveforms
Note: WRITE enable (W
) = high.
Table 3. READ mode AC characteristics
2.2 WRITE mode
The M48Z08/18 is in the WRITE mode whenever W and E are active. The start of a WRITE
is referenced from the latter occurring falling edge of W
or E.
A WRITE is terminated by the earlier rising edge of W
or E. The addresses must be held
valid throughout the cycle. E
or W must return high for a minimum of t
EHAX
from chip enable
or t
WHAX
from WRITE Enable prior to the initiation of another READ or WRITE cycle. Data-
in must be valid t
DVWH
prior to the end of WRITE and remain valid for t
WHDX
afterward. G
should be kept high during WRITE cycles to avoid bus contention; although, if the output bus
has been activated by a low on E
and G, a low on W will disable the outputs t
WLQZ
after W
falls.
Symbol Parameter
(1)
1. Valid for ambient operating temperature: T
A
= 0 to 70 °C; V
CC
= 4.75 to 5.5 V or 4.5 to 5.5 V (except where noted).
M48Z08/M48Z18
Unit
Min Max
t
AVAV
READ cycle time 100 ns
t
AVQV
Address valid to output valid 100 ns
t
ELQV
Chip enable low to output valid 100 ns
t
GLQV
Output enable low to output valid 50 ns
t
ELQX
(2)
2. C
L
= 30 pF.
Chip enable low to output transition 10 ns
t
GLQX
(2)
Output enable low to output transition 5 ns
t
EHQZ
(2)
Chip enable high to output Hi-Z 50 ns
t
GHQZ
(2)
Output enable high to output Hi-Z 40 ns
t
AXQX
Address transition to output transition 5 ns
AI01385
tAVAV
tAVQV tAXQX
tELQV
tELQX
tEHQZ
tGLQV
tGLQX
tGHQZ
VALID
A0-A12
E
G
DQ0-DQ7
VALID