M48T58 M48T58Y 5.0 V, 64 Kbit (8 Kb x 8) TIMEKEEPER® SRAM Features ■ Integrated, ultra low power SRAM, real-time clock, power-fail control circuit and battery ■ BYTEWIDE™ RAM-like clock access ■ BCD coded year, month, day, date, hours, minutes, and seconds ■ Frequency test output for real-time clock ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages (VPFD = power-fail deselect voltage): – M48T58: VCC = 4.75 to 5.5 V; 4.5 V ≤ VPFD ≤ 4.75 V – M48T58Y: VCC = 4.5 to 5.
Contents M48T58, M48T58Y Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Data retention mode . . .
M48T58, M48T58Y List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of figures M48T58, M48T58Y List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. 4/33 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M48T58, M48T58Y 1 Description Description The M48T58/Y TIMEKEEPER® RAM is a 8 Kb x 8 non-volatile static RAM and real-time clock. The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory and real-time clock solution. The M48T58/Y is a non-volatile pin and function equivalent to any JEDEC standard 8b Kb x 8 SRAM.
Description M48T58, M48T58Y Table 1. Signal names A0-A12 DQ0-DQ7 Figure 2. Address inputs Data inputs / outputs FT Frequency test output (open drain) E1 Chip enable 1 E2 Chip enable 2 G Output enable W WRITE enable VCC Supply voltage VSS Ground DIP connections FT A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS Figure 3.
M48T58, M48T58Y Figure 4.
Operation modes 2 M48T58, M48T58Y Operation modes As Figure 4 on page 7 shows, the static memory array and the quartz controlled clock oscillator of the M48T58/Y are integrated on one silicon chip. The two circuits are interconnected at the upper eight memory locations to provide user accessible BYTEWIDE™ clock information in the bytes with addresses 1FF8h-1FFFh. The clock locations contain the century, year, month, date, day, hour, minute, and second in 24 hour BCD format (except for the century).
M48T58, M48T58Y 3 READ mode READ mode The M48T58/Y is in the READ mode whenever W (WRITE enable) is high, E1 (chip enable 1) is low, and E2 (chip enable 2) is high. The unique address specified by the 13 address inputs defines which one of the 8,192 bytes of data is to be accessed. Valid data will be available at the data I/O pins within address access time (tAVQV) after the last address input signal is stable, providing that the E1, E2, and G access times are also satisfied.
READ mode M48T58, M48T58Y Table 3.
M48T58, M48T58Y 4 WRITE mode WRITE mode The M48T58/Y is in the WRITE mode whenever W and E1 are low and E2 is high. The start of a WRITE is referenced from the latter occurring falling edge of W or E1, or the rising edge of E2. A WRITE is terminated by the earlier rising edge of W or E1, or the falling edge of E2. The addresses must be held valid throughout the cycle.
WRITE mode Figure 7.
M48T58, M48T58Y Table 4.
Data retention mode 5 M48T58, M48T58Y Data retention mode With valid VCC applied, the M48T58/Y operates as a conventional BYTEWIDE™ static RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write protecting itself when VCC falls within the VPFD (max), VPFD (min) window. All outputs become high impedance, and all inputs are treated as “don't care.
M48T58, M48T58Y 6 Clock operations 6.1 Reading the clock Clock operations Updates to the TIMEKEEPER® registers (see Table 5) should be halted before clock data is read to prevent reading data in transition. The BiPORT™ TIMEKEEPER cells in the RAM array are only data registers and not the actual clock counters, so updating the registers can be halted without disturbing the clock itself. Updating is halted when a '1' is written to the READ bit, D6 in the control register 1FF8h.
Clock operations Table 5.
M48T58, M48T58Y Clock operations sign bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration occurs within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a binary 6 is loaded, the first 12 will be affected, and so on.
Clock operations Figure 8. M48T58, M48T58Y Crystal accuracy across temperature ppm 20 0 -20 -40 ΔF = -0.038 ppm (T - T )2 ± 10% 0 F C2 -60 T0 = 25 °C -80 -100 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 °C AI02124 Figure 9.
M48T58, M48T58Y 6.5 Clock operations Battery low flag The M48T58/Y automatically performs periodic battery voltage monitoring upon power-up. The battery low flag (BL), bit D6 of the flags register 1FFDh, will be asserted high if the internal or SNAPHAT® battery is found to be less than approximately 2.5 V and the battery low enable (BLE) bit has been previously set to '1.' The BL flag will remain active until completion of battery replacement and subsequent battery low monitoring tests.
Clock operations 6.7 M48T58, M48T58Y VCC noise and negative going transients ICC transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur. A bypass capacitor value of 0.
M48T58, M48T58Y 7 Maximum ratings Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 6.
DC and AC parameters 8 M48T58, M48T58Y DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under the measurement conditions listed in Table 7. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. Table 7.
M48T58, M48T58Y Table 9. DC and AC parameters DC characteristics Symbol M48T58 Test condition(1) Parameter Unit Min Input leakage current ILI ILO(2) Output leakage current M48T58Y Max Min Max 0 V ≤ VIN ≤ VCC ±1 ±1 µA 0 V ≤ VOUT ≤ VCC ±1 ±1 µA Outputs open 50 50 mA E1 = VIH E2 = VIO 3 3 mA E1 = VCC – 0.2 V E2 = VSS + 0.2 V 3 3 mA ICC Supply current ICC1 Supply current (standby) TTL ICC2 Supply current (standby) CMOS VIL Input low voltage –0.3 0.8 –0.3 0.
DC and AC parameters Table 10. M48T58, M48T58Y Power down/up AC characteristics Parameter(1) Symbol Min tPD E1 or W at VIH or E2 at VIL before power down tF(2) VPFD (max) to VPFD (min) VCC fall time tFB(3) VPFD (min) to VSS VCC fall time Max 0 Unit µs 300 µs M48T58 10 µs M48T58Y 10 µs tR VPFD (min) to VPFD (max) VCC rise time 10 µs tRB VSS to VPFD (min) VCC rise time 1 µs trec VPFD (max) to inputs recognized 40 200 ms 1.
M48T58, M48T58Y 9 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 13. PCDIP28 – 28-pin plastic DIP, battery CAPHAT™, package outline A2 A1 B1 B A L C e1 eA e3 D N E 1 PCDIP Note: Drawing is not to scale.
Package mechanical data M48T58, M48T58Y Figure 14. SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT®, package outline A2 A C B eB e CP D N E H A1 a L 1 Note: SOH-A Drawing is not to scale. Table 13. SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT®, package mech. data mm inches Symb Typ Min A Typ Min 3.05 Max 0.120 A1 0.05 0.36 0.002 0.014 A2 2.34 2.69 0.092 0.106 B 0.36 0.51 0.014 0.020 C 0.15 0.32 0.006 0.012 D 17.71 18.49 0.
M48T58, M48T58Y Package mechanical data Figure 15. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, pack. outline A1 A2 A eA A3 B L eB D E SHTK-A Note: Drawing is not to scale. Table 14. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, package mech. data mm inches Symb Typ Min A Max Typ Min 9.78 Max 0.385 A1 6.73 7.24 0.265 0.285 A2 6.48 6.99 0.255 0.275 A3 0.38 0.015 B 0.46 0.56 0.018 0.022 D 21.21 21.84 0.835 0.860 E 14.22 14.99 0.560 0.
Package mechanical data M48T58, M48T58Y Figure 16. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, package outline A1 A2 A eA A3 B L eB D E SHTK-A Note: Drawing is not to scale. Table 15. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, package mech. data mm inches Symb Typ Min A Typ Min 10.54 Max 0.415 A1 8.00 8.51 0.315 0.335 A2 7.24 8.00 0.285 0.315 A3 28/33 Max 0.38 0.015 B 0.46 0.56 0.018 0.022 D 21.21 21.84 0.835 0.860 E 17.27 18.
M48T58, M48T58Y 10 Part numbering Part numbering Table 16. Ordering information scheme Example: M48T 58 –70 MH 1 E Device type M48T Supply voltage and write protect voltage 58(1) = VCC = 4.75 to 5.5 V; VPFD = 4.5 to 4.75 V 58Y = VCC = 4.5 to 5.5 V; VPFD = 4.2 to 4.
Part numbering M48T58, M48T58Y Table 17.
M48T58, M48T58Y 11 Environmental information Environmental information Figure 17. Recycling symbols This product contains a non-rechargeable lithium (lithium carbon monofluoride chemistry) button cell battery fully encapsulated in the final product. Recycle or dispose of batteries in accordance with the battery manufacturer's instructions and local/national disposal and recycling regulations.
Revision history 12 M48T58, M48T58Y Revision history Table 18. 32/33 Document revision history Date Revision Changes Jul-1999 1 27-Jul-2000 1.1 04-Jun-2001 2 31-Jul-2001 2.1 Formatting changes from recent document review findings 20-May-2002 2.2 Modify reflow time and temperature footnotes (Table 6) 01-Apr-2003 3 v2.2 template applied; test condition updated (Table 11) 17-Jul-2003 3.
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