Datasheet

M48T58, M48T58Y WRITE mode

Doc ID 2412 Rev 8 11/33

4 WRITE mode

The M48T58/Y is in the WRITE mode whenever W and E1 are low and E2 is high. The start

of a WRITE is referenced from the latter occurring falling edge of W

or E1, or the rising edge

of E2. A WRITE is terminated by the earlier rising edge of W

or E1, or the falling edge of E2.

The addresses must be held valid throughout the cycle. E1

or W must return high or E2 low

for a minimum of t

E1HAX

or t

E2LAX

from chip enable or t

WHAX

from WRITE enable prior to the

initiation of another READ or WRITE cycle. Data-in must be valid t

DVWH

prior to the end of

WRITE and remain valid for t

WHDX

afterward. G should be kept high during WRITE cycles to

avoid bus contention; although, if the output bus has been activated by a low on E1

and G

and a high on E2, a low on W

will disable the outputs t

WLQZ

after W falls.

Figure 6. WRITE enable controlled, WRITE AC waveform

AI00963

tAVAV

tWHAX

tDVWH

DATA INPUT

A0-A12

DQ0-DQ7

VALID

tAVWH

tAVE1L

tAVE2H

tWLWH

tAVWL

tWLQZ

tWHDX

tWHQX