M48T35AV 3.3 V, 256 Kbit (32 Kbit x 8) TIMEKEEPER® SRAM Features ■ Integrated, ultra low power SRAM, real-time clock, power-fail control circuit and battery ■ BYTEWIDE™ RAM-like clock access ■ BCD coded year, month, day, date, hours, minutes, and seconds ■ Battery low flag (BOK) ■ Frequency test output for real-time clock ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltage (VPFD = power-fail deselect voltage): – M48T35AV: VCC = 3.0 to 3.6 V; 2.7 V ≤ VPFD ≤ 3.
Contents M48T35AV Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 2.1 READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.3 Data retention mode . .
M48T35AV List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 READ mode AC characteristics . .
List of figures M48T35AV List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. 4/29 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M48T35AV 1 Description Description The M48T35AV TIMEKEEPER® RAM is a 32 Kbit x 8 non-volatile static RAM and real-time clock. The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory and real-time clock solution. The M48T35AV is a non-volatile pin and function equivalent to any JEDEC standard 32 Kb x 8 SRAM.
Description M48T35AV Table 1. Signal names A0-A14 Address inputs DQ0-DQ7 Data inputs / outputs E Chip enable G Output enable W WRITE enable VCC Supply voltage VSS Ground Figure 2. DIP connections A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 M48T35AV 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC W A13 A8 A9 A11 G A10 E DQ7 DQ6 DQ5 DQ4 DQ3 AI02798B Figure 3.
M48T35AV Figure 4.
Operation modes 2 M48T35AV Operation modes As Figure 4 on page 7 shows, the static memory array and the quartz controlled clock oscillator of the M48T35AV are integrated on one silicon chip. The two circuits are interconnected at the upper eight memory locations to provide user accessible BYTEWIDE™ clock information in the bytes with addresses 7FF8h-7FFFh. The clock locations contain the year, month, date, day, hour, minute, and second in 24-hour BCD format.
M48T35AV Operation modes The state of the eight three-state data I/O signals is controlled by E and G. If the outputs are activated before tAVQV, the data lines will be driven to an indeterminate state until tAVQV. If the Address Inputs are changed while E and G remain active, output data will remain valid for output data hold time (tAXQX) but will go indeterminate until the next address access. Figure 5.
Operation modes 2.2 M48T35AV WRITE mode The M48T35AV is in the WRITE mode whenever W and E are low. The start of a WRITE is referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the earlier rising edge of W or E. The addresses must be held valid throughout the cycle. E or W must return high for a minimum of tEHAX from chip enable or tWHAX from WRITE enable prior to the initiation of another READ or WRITE cycle.
M48T35AV Operation modes Table 4.
Operation modes M48T35AV Also, as VCC rises, the battery voltage is checked. If the voltage is less than approximately 2.5 V, an internal battery not OK (BOK) flag will be set. The BOK flag can be checked after power up. If the BOK flag is set, the first WRITE attempted will be blocked. The flag is automatically cleared after the first WRITE, and normal RAM operation resumes. Figure 8 illustrates how a BOK check routine could be structured.
M48T35AV Clock operations 3 Clock operations 3.1 Reading the clock Updates to the TIMEKEEPER® registers (see Table 5) should be halted before clock data is read to prevent reading data in transition. The BiPORT™ TIMEKEEPER cells in the RAM array are only data registers and not the actual clock counters, so updating the registers can be halted without disturbing the clock itself. Updating is halted when a '1' is written to the READ bit, D6 in the control register 7FF8h.
Clock operations Table 5. M48T35AV Register map Data Address D7 D6 7FFEh 0 0 0 7FFDh 0 0 10 date 7FFCh 0 FT 7FFBh 0 0 7FFAh 0 7FF9h ST 7FF8h W 7FFFh D5 D4 D3 D2 10 years D1 D0 Function/range BCD format Year Year 00-99 Month Month 01-12 Date Date 01-31 Century/day 00-01/01-07 Hours Hours 00-23 10 minutes Minutes Minutes 00-59 10 seconds Seconds Seconds 00-59 10 M.
M48T35AV Clock operations occurs within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have one second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a binary 6 is loaded, the first 12 will be affected, and so on.
Clock operations M48T35AV Figure 9. Crystal accuracy across temperature ppm 20 0 -20 -40 ΔF = -0.038 ppm (T - T )2 ± 10% 0 F C2 -60 T0 = 25 °C -80 -100 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 °C AI02124 Figure 10.
M48T35AV 3.6 Clock operations VCC noise and negative going transients ICC transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur. A bypass capacitor value of 0.
Maximum ratings 4 M48T35AV Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 6.
M48T35AV 5 DC and AC parameters DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under the measurement conditions listed in the relevant tables. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. Table 7.
DC and AC parameters Table 9. M48T35AV DC characteristics Symbol M48T35AV Test condition(1) Parameter Unit Min ILI ILO(2) Input leakage current Output leakage current ICC Supply current ICC1 Supply current (standby) TTL ICC2 Supply current (standby) CMOS (3) Max 0 V ≤ VIN ≤ VCC ±1 µA 0 V ≤ VOUT ≤ VCC ±1 µA Outputs open 30 mA E = VIH 2 mA E = VCC – 0.2 V 2 mA Input low voltage –0.3 0.8 V VIH Input high voltage 2.2 VCC + 0.3 V VOL Output low voltage IOL = 2.1 mA 0.
M48T35AV Table 10. DC and AC parameters Power down/up AC characteristics Parameter(1) Symbol tPD E or W at VIH before power down tF(2) tFB(3) Min Max Unit 0 µs VPFD (max) to VPFD (min) VCC fall time 300 µs VPFD (min) to VSS VCC fall time 150 µs tR VPFD (min) to VPFD (max) VCC rise time 10 µs tRB VSS to VPFD (min) VCC rise time 1 µs trec VPFD (max) to inputs recognized 40 200 ms 1. Valid for ambient operating temperature: TA = 0 to 70 °C or –40 to 85 °C; VCC = 4.5 to 5.5 V or 3.
Package mechanical data 6 M48T35AV Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 14. PCDIP28 – 28-pin plastic DIP, battery CAPHAT™, package outline A2 A1 B1 B A L C e1 eA e3 D N E 1 PCDIP Note: Drawing is not to scale.
M48T35AV Package mechanical data Figure 15. SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT®, package outline A2 A C B eB e CP D N E H A1 α L 1 SOH-A Note: Drawing is not to scale. Table 13. SOH28 – 28-lead plastic small outline, 4-socket battery SNAPHAT®, pack. mech. data mm inches Symb Typ Min A Max Typ Min 3.05 Max 0.120 A1 0.05 0.36 0.002 0.014 A2 2.34 2.69 0.092 0.106 B 0.36 0.51 0.014 0.020 C 0.15 0.32 0.006 0.012 D 17.71 18.49 0.697 0.
Package mechanical data M48T35AV Figure 16. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, pack. outline A1 A2 A3 A eA B L eB D E SHTK-A Note: Drawing is not to scale. Table 14. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, pack. mech. data mm inches Symb Typ Min A Typ Min 9.78 Max 0.385 A1 6.73 7.24 0.265 0.285 A2 6.48 6.99 0.255 0.275 A3 24/29 Max 0.38 0.015 B 0.46 0.56 0.018 0.022 D 21.21 21.84 0.835 0.860 E 14.22 14.99 0.560 0.
M48T35AV Package mechanical data Figure 17. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, pack. outline A1 A2 A3 A eA B L eB D E SHTK-A Note: Drawing is not to scale. Table 15. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, pack. mech. data mm inches Symb Typ Min A Max Typ Min 10.54 Max 0.415 A1 8.00 8.51 0.315 0.335 A2 7.24 8.00 0.285 0.315 A3 0.38 0.015 B 0.46 0.56 0.018 0.022 D 21.21 21.84 0.835 0.860 E 17.27 18.03 0.680 0.
Part numbering 7 M48T35AV Part numbering Table 16. Ordering information scheme Example: M48T 35AV –10 MH 1 E Device type M48T Supply voltage and write protect voltage 35AV = VCC = 3.0 to 3.6 V; VPFD = 2.7 to 3.0 V Speed –10 = 100 ns (35AV) Package PC = PCDIP28 MH(1) = SOH28 Temperature range 1 = 0 to 70°C Shipping method For SOH28: E = Lead-free package (ECOPACK®), tubes F = Lead-free package (ECOPACK®), tape & reel For PCDIP28: blank = tubes 1.
M48T35AV 8 Environmental information Environmental information Figure 18. Recycling symbols This product contains a non-rechargeable lithium (lithium carbon monofluoride chemistry) button cell battery fully encapsulated in the final product. Recycle or dispose of batteries in accordance with the battery manufacturer's instructions and local/national disposal and recycling regulations.
Revision history 9 M48T35AV Revision history Table 18. 28/29 Document revision history Date Revision Changes Nov-1999 1 First issue From preliminary data to datasheet 21-Apr-2000 2 29-May-2000 2.1 20-Jul-2001 3 20-May-2002 3.1 31-Mar-2003 4 v2.
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