M48T201Y M48T201V 5.0 or 3.3 V TIMEKEEPER® supervisor Features ■ Converts low power SRAM into NVRAMs ■ Year 2000 compliant ■ Battery low flag ■ Integrated real time clock, power-fail control circuit, battery and crystal ■ Watchdog timer ■ Choice of write protect voltages (VPFD = power-fail deselect voltage): – M48T201Y: VCC = 4.5 to 5.5 V 4.1V ≤ VPFD ≤ 4.5 V – M48T201V: VCC = 3.0 to 3.6 V 2.7 V ≤ VPFD ≤ 3.
Contents M48T201Y, M48T201V Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 2.1 Address decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.
M48T201Y, M48T201V 9 Contents Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of tables M48T201Y, M48T201V List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. 4/37 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M48T201Y, M48T201V List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description 1 M48T201Y, M48T201V Description The M48T201Y/V are self-contained devices that include a real time clock (RTC), programmable alarms, a watchdog timer, and a square wave output which provides control of up to 512 K x 8 of external low-power static RAM. Access to all RTC functions and the external RAM is the same as conventional bytewide SRAM. The 16 TIMEKEEPER® registers offer year, month, date, day, hour, minute, second, calibration, alarm, century, watchdog, and square wave output data.
M48T201Y, M48T201V Table 1.
Description M48T201Y, M48T201V Figure 2.
M48T201Y, M48T201V Figure 3. Description Hardware hookup A0-Axx A0-A18 32,768 Hz CRYSTAL VCC VOUT 0.1μF 5V LITHIUM CELL E2(1) M48T201Y/V VCC 0.1μF CMOS SRAM E ECON W W G WDI GCON RSTIN1 RST RSTIN2 IRQ/FT VSS E SQW DQ0-DQ7 G VSS DQ0-DQ7 AI00604 1. If the second chip enable pin (E2) is unused, it should be tied to VOUT.
Operation 2 M48T201Y, M48T201V Operation Automatic backup and write protection for an external SRAM is provided through VOUT, ECON, and GCON pins. (Users are urged to insure that voltage specifications, for both the supervisor chip and external SRAM chosen, are similar.) The SNAPHAT® containing the lithium energy source is used to retain the RTC and RAM data in the absence of VCC power through the VOUT pin.
M48T201Y, M48T201V Table 2. Operation Operating modes Mode VCC Deselect 4.5 V to 5.5 V or 3.0 V to 3.6 V WRITE READ READ Deselect (1) VSO to VPFD (min) ≤ Deselect VSO(1) E G W DQ7DQ0 Power VIH X X High-Z Standby VIL X VIL DIN Active VIL VIL VIH DOUT Active VIL VIH VIH High-Z Active X X X High-Z CMOS standby X X X High-Z Battery backup 1. See Table 14 on page 30 for details. Note: X = VIH or VIL; VSO = battery backup switchover voltage 2.
Operation Figure 5.
M48T201Y, M48T201V Table 3.
Operation Figure 6.
M48T201Y, M48T201V Table 4.
Operation Note: M48T201Y, M48T201V Most low power SRAMs on the market today can be used with the M48T201Y/V TIMEKEEPER® SUPERVISOR. There are, however some criteria which should be used in making the final choice of an SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M48T201Y/V and SRAMs to be “Don't care” once VCC falls below VPFD (min). The SRAM should also guarantee data retention down to VCC = 2.0 V.
M48T201Y, M48T201V 3 Clock operation 3.1 TIMEKEEPER® registers Clock operation The M48T201Y/V offers 16 internal registers which contain TIMEKEEPER®, alarm, watchdog, flag, and control data (see Table 5 on page 18). These registers are memory locations which contain external (user accessible) and internal copies of the data (usually referred to as BiPORT™ TIMEKEEPER cells).
Clock operation M48T201Y, M48T201V Note: It is not necessary to set the WRITE bit when setting or resetting the FREQUENCY TEST bit (FT) or the STOP bit (ST). Table 5.
M48T201Y, M48T201V 3.5 Clock operation Setting the alarm clock Registers 7FFF6h-7FFF2h contain the alarm settings. The alarm can be configured to go off at a prescribed time on a specific month, day of month, hour, minute, or second or repeat every month, day of month, hour, minute, or second. It can also be programmed to go off while the M48T201Y/V is in the battery backup to serve as a system wake-up call. Bits RPT5-RPT1 put the alarm in the repeat mode of operation.
Clock operation Figure 8. M48T201Y, M48T201V Backup mode alarm waveforms tREC VCC VPFD (max) VPFD (min) VSO AFE bit/ABE bit AF bit in Flags Register IRQ/FT HIGH-Z HIGH-Z AI03520 3.6 Watchdog timer The watchdog timer can be used to detect an out-of-control microprocessor. The user programs the watchdog timer by setting the desired amount of timeout into the Watchdog Register, address 7FFF7h.
M48T201Y, M48T201V Clock operation In order to perform a software reset of the watchdog timer, the original timeout period can be written into the watchdog register, effectively restarting the countdown cycle. Should the watchdog timer time out, and the WDS bit is programmed to output an interrupt, a value of 00h needs to be written to the watchdog register in order to clear the IRQ/FT pin. This will also disable the watchdog function until it is again programmed correctly.
Clock operation 3.8 M48T201Y, M48T201V Power-on reset The M48T201Y/V continuously monitors VCC. When VCC falls to the power fail detect trip point, the RST pulls low (open drain) and remains low on power-up for tREC after VCC passes VPFD (max). The RST pin is an open drain output and an appropriate pull-up resistor to VCC should be chosen to control rise time. 3.9 Reset inputs (RSTIN1 & RSTIN2) The M48T201Y/V provides two independent inputs which can generate an output reset.
M48T201Y, M48T201V Clock operation The oscillation rate of crystals changes with temperature (see Figure 10 on page 24). The M48T201Y/V design employs periodic counter correction. The calibration circuit adds or subtracts counts from the oscillator divider circuit at the divide by 256 stage, as shown in Figure 11 on page 24.
Clock operation M48T201Y, M48T201V Figure 10. Crystal accuracy across temperature Frequency (ppm) 20 0 –20 –40 –60 –80 –100 ΔF = -0.038 ppm (T - T )2 ± 10% 0 F C2 –120 T0 = 25 °C –140 –160 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 Temperature °C AI00999 Figure 11. Calibration waveform NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION AI00594B 3.
M48T201Y, M48T201V Clock operation If a battery low indication is generated during the 24-hour interval check, this indicates that the battery is near end of life. However, data is not compromised due to the fact that a nominal VCC is supplied. In order to insure data integrity during subsequent periods of battery backup mode, the battery should be replaced. The SNAPHAT® top may be replaced while VCC is applied to the device.
Clock operation 3.13 M48T201Y, M48T201V VCC noise and negative going transients ICC transients, including those produced by output switching, can produce voltage fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the bypass capacitors will be released as low going spikes are generated or energy will be absorbed when overshoots occur. A ceramic bypass capacitor value of 0.
M48T201Y, M48T201V 4 Maximum ratings Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC and AC parameters 5 M48T201Y, M48T201V DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under the measurement conditions listed in Table 11: DC and AC measurement conditions. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters.
M48T201Y, M48T201V Table 13. Sym DC and AC parameters DC characteristics Parameter Test condition(1) Min ILI(2) Input leakage current ILO(3) M48T201Y M48T201V –70 –85 Typ Max Min Typ Unit Max 0V ≤ VIN ≤ VCC ±1 ±1 µA Output leakage current 0V ≤ VOUT ≤ VCC ±1 ±1 µA ICC Supply current Outputs open 10 mA ICC1 Supply current (standby) TTL E = VIH 5 3 mA ICC2 Supply current (standby) CMOS E = VCC –0.
DC and AC parameters M48T201Y, M48T201V Figure 14. Power down/up mode AC waveforms VCC VPFD (max) VPFD (min) VSO tF tR tFB INPUTS VALID OUTPUTS VALID tRB tREC VALID DON'T CARE HIGH-Z VALID RST AI03519 Table 14.
M48T201Y, M48T201V 6 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 15.
Package mechanical data M48T201Y, M48T201V Figure 16. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, package outline A1 A2 A3 A eA B L eB D E SHTK-A Note: Drawing is not to scale. Table 16. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, pack. mech. data mm inches Symb Typ Min A Typ Min 9.78 Max 0.385 A1 6.73 7.24 0.265 0.285 A2 6.48 6.99 0.255 0.275 A3 32/37 Max 0.38 0.015 B 0.46 0.56 0.018 0.022 D 21.21 21.84 0.835 0.860 E 14.22 14.
M48T201Y, M48T201V Package mechanical data Figure 17. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, pack. outline A1 A2 A3 A eA B L eB D E SHTK-A Note: Drawing is not to scale. Table 17. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, pack. mech. data mm inches Symb Typ Min A Max Typ Min 10.54 Max 0.415 A1 8.00 8.51 0.315 .0335 A2 7.24 8.00 0.285 0.315 A3 0.38 0.015 B 0.46 0.56 0.018 0.022 D 21.21 21.84 0.835 0.860 E 17.27 18.03 0.
Part numbering 7 M48T201Y, M48T201V Part numbering Table 18. Ordering information scheme Example: M48T 201Y –70 MH 1 F Device type M48T Supply and write protect voltage 201Y = VCC = 4.5 to 5.5 V; VPFD = 4.1 V to 4.5 V 201V = VCC = 3.0 to 3.6 V; VPFD = 2.7 V to 3.
M48T201Y, M48T201V 8 Environmental information Environmental information Figure 18. Recycling symbols This product contains a non-rechargeable lithium (lithium carbon monofluoride chemistry) button cell battery fully encapsulated in the final product. Recycle or dispose of batteries in accordance with the battery manufacturer's instructions and local/national disposal and recycling regulations.
Revision history 9 M48T201Y, M48T201V Revision history Table 20. 36/37 Document revision history Date Revision Nov-1999 1 Changes First issue 10-May-2001 2 14-May-2001 2.1 Corrected table footnote (Table 14) Reformatted; added industrial temperature (Table 10, 13, 3, 4, 14) 30-May-2001 2.2 Change “controller” references to “supervisor” 01-Aug-2001 2.3 Formatting changes from recent document review findings; E2 added to hookup (Figure 3) 08-Aug-2001 2.
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