M41T94 Serial real-time clock with 44 bytes NVRAM and reset Features ■ Counters for tenths/hundredths of seconds, seconds, minutes, hours, day, date, month, year, and century ■ 32 KHz crystal oscillator integrating load capacitance (12.5 pF) providing exceptional oscillator stability and high crystal series resistance operation ■ Serial peripheral interface (2 MHz SPI) ■ Ultralow battery supply current of 500 nA (max) ■ 2.7 to 5.5 V operating voltage ■ 2.5 to 5.
Contents M41T94 Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 4 2.1 Serial data output (SDO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2 Serial data input (SDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 Serial clock (SCL) . . . . .
M41T94 Contents 8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 9 Environmental information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 10 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of figures M41T94 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. 4/41 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 16-pin SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M41T94 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description 1 M41T94 Description The M41T94 is a serial real-time clock with 44 bytes of NVRAM and a RESET output. A built-in 32,768 Hz oscillator (external crystal controlled) and 8 bytes of the SRAM (see Table 4 on page 18) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 12 bytes of RAM provide status/control of alarm, watchdog and square wave functions. Addresses and data are transferred serially via a serial SPI interface.
M41T94 Description Figure 1. Logic diagram VCC VBAT XI XO (1) (1) (1) SCL RST SDI IRQ/FT/OUT M41T94 E SQW SDO RSTIN1 RSTIN2 WDI THS VSS AI03683 1. For SO16 package only. Figure 2.
Description M41T94 Table 1. Signal names E Chip enable IRQ/FT/OUT Interrupt/frequency test/out output (open drain) RST Reset output (open drain) RSTIN1 Reset 1 input RSTIN2 Reset 2 input SCL Serial clock input SDI Serial data input SDO Serial data output SQW Square wave output THS Threshold select pin WDI Watchdog input XI (1) Oscillator input XO (1) VBAT Oscillator output (1) Battery supply voltage VCC Supply voltage VSS Ground 1. For SO16 package only. Figure 3.
M41T94 Description Figure 4. Block diagram REAL TIME CLOCK CALENDAR E 44 BYTES USER RAM SDO SPI INTERFACE SDI IRQ/FT/OUT(1) WDF WATCHDOG 32KHz OSCILLATOR Crystal AF RTC w/ALARM & CALIBRATION SCL SQUARE WAVE SQW WDI VCC VBAT VBL= 2.5V COMPARE VSO = 2.5V COMPARE VPFD = 4.4V COMPARE BL POR (2.65V if THS = VSS) RSTIN1 RST(1) RSTIN2 AI04785 1. Open drain output Figure 5.
Description Table 2. M41T94 Function table Mode E SCL SDI SDO Disable reset H Input disabled Input disabled High Z WRITE L Data bit latch High Z X Next data bit shift (1) AI04630 READ L AI04631 1. SDO remains at High Z until eight bits of data are ready to be shifted out during a READ. Figure 6.
M41T94 Signal description 2 Signal description 2.1 Serial data output (SDO) The output pin is used to transfer data serially out of the memory. Data is shifted out on the falling edge of the serial clock. 2.2 Serial data input (SDI) The input pin is used to transfer data serially into the device. Instructions, addresses, and the data to be written, are each received this way. Input is latched on the rising edge of the serial clock. 2.
Operation 3 M41T94 Operation The M41T94 clock operates as a slave device on the SPI serial bus. Each memory device is accessed by a simple serial interface that is SPI bus compatible. The bus signals are SCL, SDI and SDO (see Table 1 on page 8 and Figure 5 on page 9). The device is selected when the chip enable input (E) is held low. All instructions, addresses and data are shifted serially in and out of the chip.
M41T94 3.1 Operation SPI bus characteristics The serial peripheral interface (SPI) bus is intended for synchronous communication between different ICs. It consists of four signal lines: serial data input (SDI), serial data output (SDO), serial clock (SCL) and a chip enable (E). By definition a device that gives out a message is called “transmitter,” the receiving device that gets the message is called “receiver.” The device that controls the message is called “master.
Operation Figure 8. M41T94 Output timing requirements E tCH SCL tCLQV tCL tEHQZ tCLQX LSB OUT MSB OUT SDO tQLQH tQHQL SDI ADDR. LSB IN AI04634 Table 3.
M41T94 3.2 Operation Read and write cycles Address and data are shifted MSB first into the serial data input (SDI) and out of the serial data output (SDO). Any data transfer considers the first bit to define whether a READ or WRITE will occur. This is followed by seven bits defining the address to be read or written. Data is transferred out of the SDO for a READ operation and into the SDI for a WRITE operation.
Operation Figure 9. M41T94 Read mode sequence E 0 3 2 1 5 4 7 6 9 8 12 13 14 15 16 17 22 SCL 7 BIT ADDRESS W/R BIT SDI 7 6 5 4 3 2 1 0 MSB SDO DATA OUT (BYTE 1) 7 HIGH IMPEDANCE 6 5 4 3 2 DATA OUT (BYTE 2) 1 0 7 6 5 4 3 2 1 0 MSB MSB AI04635 Figure 10.
M41T94 4 Clock operations Clock operations The eight byte clock register (see Table 4 on page 18) is used to both set the clock and to read the date and time from the clock, in a binary coded decimal format. Tenths/hundredths of seconds, seconds, minutes, and hours are contained within the first four registers. Bits D6 and D7 of clock register 03h (century/hours register) contain the CENTURY ENABLE bit (CEB) and the CENTURY bit (CB).
Clock operations M41T94 Clock register map(1) Table 4. Addr Function/range D7 00h D6 D5 D4 D3 0.1 seconds D1 D0 BCD format 0.
M41T94 4.3 Clock operations Setting alarm clock registers Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go off at a prescribed time on a specific month, date, hour, minute, or second, or repeat every year, month, day, hour, minute, or second. It can also be programmed to go off while the M41T94 is in the battery backup to serve as a system wake-up call. Bits RPT5-RPT1 put the alarm in the repeat mode of operation.
Clock operations M41T94 Figure 12.
M41T94 4.4 Clock operations Watchdog timer The watchdog timer can be used to detect an out-of-control microprocessor. The user programs the watchdog timer by setting the desired amount of time-out into the Watchdog register, address 09h. bits BMB4-BMB0 store a binary multiplier and the two lower order bits RB1-RB0 select the resolution, where 00 = 1/16 second, 01 = 1/4 second, 10 = 1 second, and 11 = 4 seconds.
Clock operations M41T94 Table 6. Square wave output frequency Square wave bits 4.6 Square wave RS3 RS2 RS1 RS0 Frequency Units 0 0 0 0 None – 0 0 0 1 32.768 kHz 0 0 1 0 8.192 kHz 0 0 1 1 4.096 kHz 0 1 0 0 2.048 kHz 0 1 0 1 1.
M41T94 Clock operations Figure 13. RSTIN1 and RSTIN2 timing waveforms RSTIN1 tRLRH1 RSTIN2 tRLRH2 RST (1) tR1HRH tR2HRH AI03665 Table 7. Symbol Reset AC characteristics(1) Parameter Min Max Unit tRLRH1(2) RSTIN1 low to RSTIN1 high 200 ns tRLRH2(3) RSTIN2 low to RSTIN2 high 100 ms tR1HRH(4) RSTIN1 high to RST high 40 200 ms tR2HRH(4) RSTIN2 high to RST high 40 200 ms 1. Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 2.7 to 5.5 V (except where noted). 2.
Clock operations M41T94 Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of adjustment per calibration step in the calibration register. Assuming that the oscillator is running at exactly 32,768 Hz, each of the 31 increments in the calibration byte would represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or –2.75 minutes per month.
M41T94 Clock operations Figure 14. Crystal accuracy across temperature Frequency (ppm) 20 0 –20 –40 –60 –80 ΔF = K x (T –T )2 O F –100 K = –0.036 ppm/°C2 ± 0.006 ppm/°C2 –120 TO = 25°C ± 5°C –140 –160 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 Temperature °C AI00999b Figure 15. Calibration waveform NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION AI00594B 4.9 Century bit Bits D7 and D6 of clock register 03h contain the CENTURY ENABLE bit (CEB) and the CENTURY bit (CB).
Clock operations 4.10 M41T94 Output driver pin When the FT bit, AFE bit and watchdog register are not set, the IRQ/FT/OUT pin becomes an output driver that reflects the contents of D7 of the control register. In other words, when D7 (OUT bit) and D6 (FT bit) of address location 08h are a '0,' then the IRQ/FT/OUT pin will be driven low. Note: The IRQ/FT/OUT pin is an open drain which requires an external pull-up resistor. 4.
M41T94 4.13 Clock operations Initial power-on defaults Upon initial application of power to the device, the following register bits are set to a '0' state: Watchdog register, TR, FT, AFE, ABE, and SQWE. The following bits are set to a '1' state: ST, OUT, and HT (see Table 9: Default values). Table 8. tREC definitions tREC time tREC bit (TR) STOP bit (ST) Units Min Max 0 0 96 98 ms 0 1 40 200(1) ms 1 X 50 2000 µs 1. Default setting Table 9.
Maximum ratings 5 M41T94 Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
M41T94 6 DC and AC parameters DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under the measurement conditions listed in the relevant tables. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. Table 11.
DC and AC parameters Table 13. M41T94 DC characteristics Symb. Test condition(1) Parameter Battery current OSC on IBAT TA = 25°C, VCC = 0 V, VBAT = 3 V Battery current OSC off ICC1 Supply current ICC2 Supply current (standby) ILI(2) Input leakage current ILO(3) Output leakage current Min Typ Max Unit 400 500 nA 50 nA f = 2 MHz 2 mA SCL, SDI = VCC – 0.3 V 1.4 mA 0 V ≤ VIN ≤ VCC ±1 µA 0 V ≤ VOUT ≤ VCC ±1 µA VIH Input high voltage 0.7VCC VCC + 0.
M41T94 DC and AC parameters Figure 17. Power down/up mode AC waveforms VCC VPFD (max) VPFD (min) VSO tF tR tFB tRB tDR INPUTS RECOGNIZED tREC DON'T CARE RECOGNIZED RST HIGH-Z OUTPUTS VALID VALID (PER CONTROL INPUT) (PER CONTROL INPUT) AI03687 Table 15.
Package mechanical data 7 M41T94 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
M41T94 Package mechanical data Figure 18. SO16 – 16-lead plastic small outline package outline A2 A C B CP e D N E H 1 A1 α L SO-b Note: Drawing is not to scale. Table 16. SO16 – 16-lead plastic small outline package mechanical data millimeters inches Symbol Typ Min A Max Typ Min 1.75 A1 0.10 A2 Max 0.069 0.25 0.004 1.60 0.010 0.063 α 0° 8° 0° 8° B 0.35 0.46 0.014 0.018 C 0.19 0.25 0.007 0.010 CP 0.10 D 9.80 10.00 – – E 3.80 L 0.40 e N 1.
Package mechanical data M41T94 Figure 19. SOH28 – 28-lead plastic small outline, battery SNAPHAT®, package outline A2 A C B eB e CP D N E H A1 α L 1 SOH-A Note: Drawing is not to scale. Table 17. SOH28 – 28-lead plastic small outline, battery SNAPHAT®, package mechanical data millimeters inches Symbol Typ Min Max Typ Min Max A – – 3.05 – – 0.120 A1 – 0.05 0.36 – 0.002 0.014 A2 – 2.34 2.69 – 0.092 0.106 B – 0.36 0.51 – 0.014 0.020 C – 0.15 0.32 – 0.
M41T94 Package mechanical data Figure 20. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, package outline A1 A2 A3 A eA B L eB D E SHTK-A Note: Drawing is not to scale. Table 18. SH – 4-pin SNAPHAT® housing for 48 mAh battery & crystal, package mechanical data millimeters inches Symbol Typ Min Max Typ Min Max A – – 9.78 – – 0.385 A1 – 6.73 7.24 – 0.265 0.285 A2 – 6.48 6.99 – 0.255 0.275 A3 – – 0.38 – – 0.015 B – 0.46 0.56 – 0.018 0.
Package mechanical data M41T94 Figure 21. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, package outline A1 A2 A3 A eA B L eB D E SHTK-A Note: Drawing is not to scale. Table 19. SH – 4-pin SNAPHAT® housing for 120 mAh battery & crystal, package mech. data millimeters inches Symbol 36/41 Typ Min Max Typ Min Max A – – 10.54 – – 0.415 A1 – 8.00 8.51 – 0.315 0.335 A2 – 7.24 8.00 – 0.285 0.315 A3 – – 0.38 – – 0.015 B – 0.46 0.56 – 0.018 0.
M41T94 8 Part numbering Part numbering Table 20. Ordering information scheme Example: M41T 94 MH 6 E Device type M41T Supply voltage and write protect voltage 94 = VCC = 2.7 to 5.5 V THS = VCC; 4.20 V ≤ VPFD ≤ 4.50 V THS = VSS; 2.55 V ≤ VPFD ≤ 2.70 V Package MQ = SO16 MH(1)= SOH28 Temperature range 6 = –40 to 85°C Shipping method E = Lead-free package (ECOPACK®), tubes F = Lead-free package (ECOPACK®), tape & reel 1.
Environmental information 9 M41T94 Environmental information Figure 22. Recycling symbols This product contains a non-rechargeable lithium (lithium carbon monofluoride chemistry) button cell battery fully encapsulated in the final product. Recycle or dispose of batteries in accordance with the battery manufacturer's instructions and local/national disposal and recycling regulations.
M41T94 10 References References The crystal supplier KDS as cited in Table 14: Crystal electrical characteristics (externally supplied) on page 30 can be contacted at kouhou@kdsj.co.jp or http://xxx.kdsj.co.jp.
Revision history 11 M41T94 Revision history Table 22. Document revision history Date Revision Apr-2002 1 25-Apr-2002 1.1 Adjust graphic (Figure 4 on page 9); fix table text (Table 10 on page 28, Table 20 on page 37); adjust characteristics (Table 13 on page 30, Table 14 on page 30) 03-Jul-2002 1.2 Modify DC, Crystal Electrical Characteristics footnotes, Default Value table (Table 13 on page 30, Table 14 on page 30, Table 9 on page 27) 06-Nov-2002 1.
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