DC and AC parameters M41T93
48/56 DocID12615 Rev 8
Figure 23. Input timing requirements
Figure 24. Output timing requirements
AI12295
SCL
SDI
E
MSB IN
SDO
tDVCH
HIGH IMPEDANCE
LSB IN
tELCHtCHEL
tCHDX
tDLDH
tDHDL
tCHCL
tCLCH
tEHCH
tEHEL
tCHEH
AI04634
SCL
SDO
E
LSB OUT
SDI
ADDR. LSB IN
tEHQZ
tCH
tCL
tQLQH
tQHQL
tCLQX
tCLQV
MSB OUT
