Datasheet

DocID012578 Rev 16 15/64
M41T82, M41T83 Operation
2.2 Read mode
In this mode the master reads the M41T8x slave after setting the slave address (see
Figure 13 on page 16). Following the WRITE mode control bit (R/W = 0) and the
acknowledge bit, the word address 'An' is written to the on-chip address pointer. Next the
START condition and slave address are repeated followed by the READ mode control bit
(R/W = 1). At this point the master transmitter becomes the master receiver. The data byte
which was addressed will be transmitted and the master receiver will send an acknowledge
bit to the slave transmitter. The address pointer is only incremented on reception of an
acknowledge clock. The M41T8x slave transmitter will now place the data byte at address
An+1 on the bus, the master receiver reads and acknowledges the new byte and the
address pointer is incremented to An+2.
This cycle of reading consecutive addresses will continue until the master receiver sends a
STOP condition to the slave transmitter. Most of the registers and memory locations are
accessed directly, but the RTC counters are accessed via a set of buffer/transfer registers at
addresses 00h to 07h. The counters are not directly read nor written. Instead, at the start of
a read or write cycle, the counters are copied into the eight buffer/transfer registers so that
the user can read them out sequentially, receiving a coherent set of data, copied from the
same instant in time.
An alternate READ mode may also be implemented whereby the master reads the M41T8x
slave without first writing to the (volatile) address pointer. The first address that is read is the
last one stored in the pointer (see Figure 14 on page 16).
Figure 12. Slave address location
AI00602
R/W
SLAVE ADDRESS
START A
0100011
MSB
LSB