M41T81 Serial access real-time clock with alarm Not recommended for new design Features ■ For all new designs other than automotive, use M41T81S (contact the ST sales office for automotive grade) ■ Counters for tenths/hundredths of seconds, seconds, minutes, hours, day, date, month, year, and century ■ 32 KHz crystal oscillator integrating load capacitance (12.
Contents M41T81 Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 3 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.
M41T81 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Clock register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Alarm repeat modes . . . . . . . . . . . . . . . . . .
List of figures M41T81 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. 4/29 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8-pin SOIC (M) connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block diagram . . . . .
M41T81 1 Description Description The M41T81 is a low-power serial RTC with a built-in 32.768 kHz oscillator (external crystal controlled). Eight bytes of the SRAM are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 12 bytes of SRAM provide status/control of alarm, watchdog and square wave functions. Addresses and data are transferred serially via a two line, bidirectional I2C interface.
Description Figure 2. M41T81 8-pin SOIC (M) connections 1 2 3 4 XI XO VBAT VSS M41T81 8 7 6 5 VCC IRQ/FT/OUT/SQW SCL SDA AI04769 Figure 3. Block diagram REAL TIME CLOCK CALENDAR 32KHz OSCILLATOR CRYSTAL RTC W/ALARM & CALIBRATION AFE IRQ/FT/OUT/SQW(1,2) WATCHDOG SDA 2 I C INTERFACE SQWE SQUARE WAVE SCL WRITE PROTECT FREQUENCY TEST FT OUTPUT DRIVER OUT INTERNAL POWER VCC VBAT (3) VSO COMPARE AI04616 1. Open drain output 2.
M41T81 2 Operation Operation The M41T81 clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h).
Operation 2.1.2 M41T81 Start data transfer A change in the state of the data line, from high to low, while the clock is high, defines the START condition. 2.1.3 Stop data transfer A change in the state of the data line, from low to high, while the clock is high, defines the STOP condition. 2.1.4 Data valid The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the high period of the clock signal.
M41T81 Operation Figure 4. Serial bus data transfer sequence DATA LINE STABLE DATA VALID CLOCK DATA START CONDITION CHANGE OF DATA ALLOWED STOP CONDITION AI00587 Figure 5. Acknowledgement sequence CLOCK PULSE FOR ACKNOWLEDGEMENT START SCL FROM MASTER DATA OUTPUT BY TRANSMITTER 1 2 MSB 8 9 LSB DATA OUTPUT BY RECEIVER AI00601 2.2 READ mode In this mode the master reads the M41T81 slave after setting the slave address (see Figure 7 on page 10).
Operation M41T81 An alternate READ mode may also be implemented whereby the master reads the M41T81 slave without first writing to the (volatile) address pointer. The first address that is read is the last one stored in the pointer (see Figure 8 on page 10). Figure 6.
M41T81 2.3 Operation WRITE mode In this mode the master transmitter transmits to the M41T81 slave receiver. Bus protocol is shown in Figure 9 on page 11. Following the START condition and slave address, a logic '0' (R/W=0) is placed on the bus and indicates to the addressed device that word address “An” will follow and is to be written to the on-chip address pointer.
Clock operation 3 M41T81 Clock operation The 20-byte register map (see Table 2 on page 13) is used to both set the clock and to read the date and time from the clock, in a binary coded decimal format. Tenths/hundredths of seconds, seconds, minutes, and hours are contained within the first four registers. Note: The tenths/hundredths of seconds cannot be written to any value other than “00.
M41T81 Table 2. Clock operation Clock register map(1) Addr D7 00h D6 D5 D4 D3 0.1 seconds D2 D1 D0 Function/range BCD format 0.
Clock operation 3.3 M41T81 Calibrating the clock The M41T81 is driven by a quartz controlled oscillator with a nominal frequency of 32,768 Hz. The devices are tested not exceed ±35 ppm (parts per million) oscillator frequency error at 25oC, which equates to about +1.9 to –1.1 minutes per month (see Figure 10 on page 15). When the calibration circuit is properly employed, accuracy improves to better than ±2 ppm at 25°C. The oscillation rate of crystals changes with temperature.
M41T81 Clock operation The IRQ/FT/OUT/SQW pin is an open drain output which requires a pull-up resistor to VCC for proper operation. A 500-10 k resistor is recommended in order to control the rise time. The FT bit is cleared on power-down. Figure 10. Crystal accuracy across temperature Frequency (ppm) 20 0 –20 –40 –60 ΔF = K x (T – T )2 O F –80 2 2 K = –0.036 ppm/°C ± 0.
Clock operation 3.4 M41T81 Setting alarm clock registers Address locations 0Ah-0Eh contain the alarm settings. The alarm can be configured to go off at a prescribed time on a specific month, date, hour, minute, or second or repeat every year, month, day, hour, minute, or second. It can also be programmed to go off while the M41T81 is in the battery backup mode to serve as a system wake-up call. Bits RPT5-RPT1 put the alarm in the repeat mode of operation.
M41T81 Clock operation Figure 13. Backup mode alarm waveform VCC VSO trec ABE and AFE Bits AF Bit in Flags Register IRQ/FT/OUT/SQW HIGH-Z AI05663 Table 3. 3.5 Alarm repeat modes RPT5 RPT4 RPT3 RPT2 RPT1 Alarm setting 1 1 1 1 1 Once per second 1 1 1 1 0 Once per minute 1 1 1 0 0 Once per hour 1 1 0 0 0 Once per day 1 0 0 0 0 Once per month 0 0 0 0 0 Once per year Watchdog timer The watchdog timer can be used to detect an out-of-control microprocessor.
Clock operation 3.6 M41T81 Square wave output The M41T81 offers the user a programmable square wave function which is output on the SQW pin. RS3-RS0 bits located in 13h establish the square wave output frequency. These frequencies are listed in Table 4. Once the selection of the SQW frequency has been completed, the IRQ/FT/OUT/SQW pin can be turned on and off under software control with the square wave enable bit (SQWE) located in register 0Ah. Table 4. Square wave output frequency Square wave bits 3.
M41T81 3.8 Clock operation Output driver pin When the FT bit, AFE bit, SQWE bit, and watchdog register are not set, the IRQ/FT/OUT/SQW pin becomes an output driver that reflects the contents of D7 of the control register. In other words, when D7 (OUT bit) and D6 (FT bit) of address location 08h are a '0,' then the IRQ/FT/OUT/SQW pin will be driven low. Note: The IRQ/FT/OUT/SQW pin is an open drain which requires an external pull-up resistor. 3.
Maximum ratings 4 M41T81 Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 6.
M41T81 5 DC and AC parameters DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under the measurement conditions listed in the relevant tables. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. Table 7.
DC and AC parameters Table 9. M41T81 DC characteristics Sym Test condition(1) Parameter Min Typ Max Unit 0V ≤ VIN ≤ VCC ±1 µA 0V ≤ VOUT ≤ VCC ±1 µA Switch freq = 400 kHz 400 µA SCL,SDA = VCC – 0.3V 100 µA ILI Input leakage current ILO Output leakage current ICC1 Supply current ICC2 Supply current (standby) VIL Input low voltage –0.3 0.3VCC V VIH Input high voltage 0.7VCC VCC + 0.3 V VOL Output low voltage IOL = 3.0 mA 0.
M41T81 DC and AC parameters Table 11. Power down/up AC characteristics Parameter(1)(2) Symbol Min Typ Max Unit tPD SCL and SDA at VIH before power down 0 - - nS trec SCL and SDA at VIH after power Up 10 - - µS 1. VCC fall time should not exceed 5 mV/µs. 2. Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = 2.0 to 5.5 V (except where noted). Table 12.
DC and AC parameters Table 13. M41T81 AC characteristics Parameter(1) Sym Min Typ Max Units 0 - 400 kHz fSCL SCL clock frequency tLOW Clock low period 1.
M41T81 6 Package mechanical information Package mechanical information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
Package mechanical information M41T81 Figure 17. SO8 – 8-lead plastic small package outline h x 45° A2 A c ccc b e 0.25 mm GAUGE PLANE D k 8 E1 E 1 A1 L L1 SO-A Note: Drawing is not to scale. Table 14. SO8 – 8-lead plastic small outline (150 mils body width), package mechanical data Millimeters inches Symbol Typ Min A Typ Min 1.75 Max 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.009 ccc 0.25 0.004 0.010 0.049 0.10 0.004 D 4.90 4.80 5.
M41T81 7 Part numbering Part numbering Table 15. Ordering information scheme Example: M41T 81 M 6 E Device type M41T Supply voltage and write protect voltage 81 = VCC = 2.0 to 5.5 V Package M = SO8 Temperature range 6 = –40°C to 85°C Shipping method E = ECOPACK® package, tubes F = ECOPACK® package, tape & reel For other options, including automotive grade, or for more information on any aspect of this device, please contact the ST sales office nearest you.
Revision history 8 M41T81 Revision history Table 16. 28/29 Document revision history Date Revision Changes Dec-2001 1 21-Jan-2002 1.1 Fix table footnotes (Table 9, Table 10) 01-May-2002 1.2 Modify reflow time and temperature footnote (Table 6) 05-Jun-2002 1.3 Modify data retention text, trip points (Table 12) 10-Jun-2002 1.4 Corrected supply voltage values (Table 6, Table 7) 03-Jul-2002 1.
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