Datasheet

Clock operation M41T66
14/34 Doc ID 15108 Rev 2
3.1 Clock registers
The M41T66 offers 16 internal registers which contain clock, calibration, alarm, watchdog,
flags, and square wave. The clock registers are memory locations which contain external
(user accessible) and internal copies of the data. The external copies are independent of
internal functions except that they are updated periodically by the simultaneous transfer of
the incremented internal copy. The internal divider (or clock) chain will be reset upon the
completion of a WRITE to any clock address (00h to 07h).
The system-to-user transfer of clock data will be halted whenever the address being read is
a clock address (00h to 07h). The update will resume either due to a stop condition or when
the pointer increments to a non-clock address.
Clock and alarm registers store data in BCD format. calibration, watchdog, and square wave
bits are written in a binary format.