Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Description
- Figure 1. M41T62 logic diagram
- Figure 2. M41T63 logic diagram
- Figure 3. M41T64 logic diagram
- Figure 4. M41T65 logic diagram
- Figure 5. M41T62 connections
- Figure 6. M41T63 connections
- Figure 7. M41T64 connections
- Figure 8. M41T65 connections
- Table 2. Signal names
- Figure 9. M41T62 block diagram
- Figure 10. M41T63 block diagram
- Figure 11. M41T64 block diagram
- Figure 12. M41T65 block diagram
- Figure 13. Hardware hookup for SuperCap™ backup operation
- 2 Operation
- 3 Clock operation
- 3.1 RTC registers
- 3.2 Calibrating the clock
- 3.3 Setting alarm clock registers
- 3.4 Watchdog timer
- 3.5 Watchdog output (WDO - M41T63/65 only)
- 3.6 Square wave output (M41T62/63/64)
- 3.7 Full-time 32 KHz square wave output (M41T64)
- 3.8 Century bits
- 3.9 Leap year
- 3.10 Output driver pin (M41T62/65)
- 3.11 Oscillator stop detection
- 3.12 Initial power-on defaults
- 4 Maximum ratings
- 5 DC and AC parameters
- Table 12. Operating and AC measurement conditions
- Figure 25. AC measurement I/O waveform
- Figure 26. Crystal isolation example
- Table 13. Capacitance
- Table 14. DC characteristics
- Table 15. Crystal electrical characteristics
- Table 16. Crystals suitable for use with M41T6x series RTCs
- Table 17. Oscillator characteristics
- Figure 27. Bus timing requirements sequence
- Table 18. AC characteristics
- 6 Package mechanical information
- Figure 28. QFN16 - 16-pin, quad, flat package, no-lead, 3 mm x 3 mm body size, outline
- Table 19. QFN16 - 16-pin, quad, flat package, no-lead, 3 mm x 3 mm body size, mechanical data
- Figure 29. QFN16 - 16-pin, quad, flat package, no-lead, 3 x 3 mm, recommended footprint
- Figure 30. LCC8 - 8-pin, 1.5 mm x 3.2 mm leadless chip carrier, outline
- Table 20. LCC8 - 8-pin, 1.5 mm x 3.2 mm leadless chip carrier, mechanical data
- Figure 31. LCC8 - 8-pin, 1.5 mm x 3.2 mm leadless chip carrier, recommended footprint
- Figure 32. Carrier tape for QFN16 3 mm x 3 mm package
- Table 21. Carrier tape dimensions for QFN16 3 mm x 3 mm package
- Figure 33. Carrier tape for LCC8 1.5 mm x 3.2 mm package
- Figure 34. Reel schematic
- Table 22. Reel dimensions for 12 mm carrier tape - QFN16 and LCC8 packages
- 7 Part numbering
- 8 Revision history
DocID10397 Rev 20 35/44
M41T62, M41T63, M41T64, M41T65 DC and AC parameters
Table 17. Oscillator characteristics
Figure 27. Bus timing requirements sequence
Table 18. AC characteristics
Symbol Parameter Conditions Min Typ Max Unit
V
STA
Oscillator start voltage ≤ 10 seconds 1.5 V
t
STA
Oscillator start time V
CC
= 3.0 V 1 s
C
g
XIN capacitance 12 pF
C
d
XOUT capacitance 12 pF
IC-to-IC frequency variation
(1)(2)
1. Reference value. T
A
= 25 °C, V
CC
= 3.0 V, CMJ-145 (C
L
= 6 pF, 32,768 Hz) manufactured by
Citizen, C
L
= C
g
• C
d
/ (C
g
+ C
d
).
2. Devices in LCC8 package ((M41T62LC6F) are tested not to exceed ±20 ppm oscillator
frequency error at 25 °C, which equates to about 52 seconds per month.
–10 +10 ppm
Sym Parameter
(1)
1. Valid for ambient operating temperature: T
A
= –40 to 85 °C; V
CC
= 1.3 to 4.4 V (except where
noted).
Min Max Units
fSCL
SCL clock frequency 0 400 kHz
tLOW
Clock low period 1.3 µs
tHIGH
Clock high period 600 ns
tR
SDA and SCL rise time 300 ns
tF
SDA and SCL fall time 300 ns
tHD:STA
START condition hold time
(after this period the first clock pulse is generated)
600 ns
tSU:STA
START condition setup time
(only relevant for a repeated start condition)
600 ns
tSU:DAT
(2)
2. Transmitter must internally provide a hold time to bridge the undefined region (300 ns max) of
the falling edge of SCL.
Data setup time 100 ns
tHD:DAT
Data hold time 0 µs
tSU:STO
STOP condition setup time 600 ns
tBUF
Time the bus must be free before a new
transmission can start
1.3 µs
trec
Watchdog output pulse width 96 98 ms
AI00589
SDA
P
t
SU:STO
t
SU:STA
t
HD:STA
SR
SCL
t
SU:DAT
t
F
t
HD:DAT
t
R
t
HIGH
t
LOW
t
HD:STA
t
BUF
SP