Datasheet
Table Of Contents
- Table 1. Device summary
- 1 Description
- Figure 1. M41T62 logic diagram
- Figure 2. M41T63 logic diagram
- Figure 3. M41T64 logic diagram
- Figure 4. M41T65 logic diagram
- Figure 5. M41T62 connections
- Figure 6. M41T63 connections
- Figure 7. M41T64 connections
- Figure 8. M41T65 connections
- Table 2. Signal names
- Figure 9. M41T62 block diagram
- Figure 10. M41T63 block diagram
- Figure 11. M41T64 block diagram
- Figure 12. M41T65 block diagram
- Figure 13. Hardware hookup for SuperCap™ backup operation
- 2 Operation
- 3 Clock operation
- 3.1 RTC registers
- 3.2 Calibrating the clock
- 3.3 Setting alarm clock registers
- 3.4 Watchdog timer
- 3.5 Watchdog output (WDO - M41T63/65 only)
- 3.6 Square wave output (M41T62/63/64)
- 3.7 Full-time 32 KHz square wave output (M41T64)
- 3.8 Century bits
- 3.9 Leap year
- 3.10 Output driver pin (M41T62/65)
- 3.11 Oscillator stop detection
- 3.12 Initial power-on defaults
- 4 Maximum ratings
- 5 DC and AC parameters
- Table 12. Operating and AC measurement conditions
- Figure 25. AC measurement I/O waveform
- Figure 26. Crystal isolation example
- Table 13. Capacitance
- Table 14. DC characteristics
- Table 15. Crystal electrical characteristics
- Table 16. Crystals suitable for use with M41T6x series RTCs
- Table 17. Oscillator characteristics
- Figure 27. Bus timing requirements sequence
- Table 18. AC characteristics
- 6 Package mechanical information
- Figure 28. QFN16 - 16-pin, quad, flat package, no-lead, 3 mm x 3 mm body size, outline
- Table 19. QFN16 - 16-pin, quad, flat package, no-lead, 3 mm x 3 mm body size, mechanical data
- Figure 29. QFN16 - 16-pin, quad, flat package, no-lead, 3 x 3 mm, recommended footprint
- Figure 30. LCC8 - 8-pin, 1.5 mm x 3.2 mm leadless chip carrier, outline
- Table 20. LCC8 - 8-pin, 1.5 mm x 3.2 mm leadless chip carrier, mechanical data
- Figure 31. LCC8 - 8-pin, 1.5 mm x 3.2 mm leadless chip carrier, recommended footprint
- Figure 32. Carrier tape for QFN16 3 mm x 3 mm package
- Table 21. Carrier tape dimensions for QFN16 3 mm x 3 mm package
- Figure 33. Carrier tape for LCC8 1.5 mm x 3.2 mm package
- Figure 34. Reel schematic
- Table 22. Reel dimensions for 12 mm carrier tape - QFN16 and LCC8 packages
- 7 Part numbering
- 8 Revision history
Clock operation M41T62, M41T63, M41T64, M41T65
18/44 DocID10397 Rev 20
3.1 RTC registers
The M41T6x user interface is comprised of 16 memory mapped registers which include
clock, calibration, alarm, watchdog, flags, and square wave control. The eight clock
counters are accessed indirectly via a set of buffer/transfer registers while the other eight
registers are directly accessed. Data in the clock and alarm registers is in BCD format.
Figure 20. Buffer/transfer registers
Updates
During normal operation when the user is not accessing the device, the buffer/transfer
registers are kept updated with a copy of the RTC counters. At the start of an I
2
C read or
write cycle, the updating is halted and the present time is frozen in the buffer/transfer
registers.
Reads of the clock registers
By halting the updates at the start of an I
2
C access, the user is ensured that all the data
transferred out during a read sequence comes from the same instant in time.
32KHz
OSC
DIVIDE BY
32768
1 Hz
READ / WRITE
BUFFER
TRANSFER
REGISTERS
I
2
C
I
2
C
INTERFACE
CENTURIES
YEARS
MONTHS
DATE
DAY-OF-WEEK
HOURS
MINUTES
SECONDS
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
COUNTER
2
CLOCK COUNTERS ARE
ACCESSED INDIRECTLY
THRU BUFFER/TRANSFER
REGISTERS
FLAGS
NON-CLOCK
REGISTERS
CALIBRATION
WATCHDOG
NON-CLOCK REGISTERS
ARE DIRECTLY ACCESSED
DATA TRANSFERRED
OUT OF I
2
C INTERFACE
ON 8
th
FALLING EDGE
OF SCL (ON WRITES)
ON WRITES, DATA TRANSFERRED
FROM BUFFERS TO COUNTERS
WHEN ADDRESS POINTER
INCREMENTS TO 8 OR WHEN I
2
C
STOP CONDITION IS RECEIVED
AT START OF READ, UDATES FROM COUNTERS
ARE HALTED AND PRESENT TIME IS FROZEN
IN BUFFER/TRANSFER REGISTERS.
AM04890v1