Datasheet

M41T56 Clock operation
Doc ID 6104 Rev 9 15/27
Figure 11. Crystal accuracy across temperature
Figure 12. Clock calibration
3.2 Output driver pin
When the FT bit is not set, the FT/OUT pin becomes an output driver that reflects the
contents of D7 of the control register. In other words, when D6 of location 7 is a '0' and D7 of
location 7 is a '0' and then the FT/OUT pin will be driven low.
Note: The FT/OUT pin is open drain which requires an external pull-up resistor.
3.3 Initial power-on defaults
Upon initial application of power to the device, the FT bit will be set to a '0' and the OUT bit
will be set to a '1.' All other register bits will initially power-on in a random state.
AI00999b
–160
0 10203040506070
Frequency (ppm)
Temperature °C
80–10–20–30–40
–100
–120
–140
–40
–60
–80
20
0
–20
ΔF
= K x (T –T
O
)
2
K = –0.036 ppm/°C
2
± 0.006 ppm/°C
2
T
O
= 25°C ± 5°C
F
AI00594B
NORMAL
POSITIVE
CALIBRATION
NEGATIVE
CALIBRATION