Datasheet

Clock operation M41ST87Y, M41ST87W

36/54 Doc ID 9497 Rev 10

Should the watchdog timer time-out, and the WDS bit is programmed to output an interrupt,

either a transition of the WDI pin, or a value of 00h needs to be written to the watchdog

/OUT pin. This will also disable the watchdog function until

it is again programmed correctly. A READ of the flags register will reset the watchdog flag

(bit D7; register 0Fh) but does not clear the IRQ

/OUT pin.

The watchdog function is automatically disabled upon power-up and the watchdog register

is cleared.

3.5 Square wave output

The M41ST87Y/W offers the user a programmable square wave function which is output on

the SQW/FT pin. RS3-RS0 bits located in 13h establish the square wave output frequency.

These frequencies are listed in Table 9 . Once the selection of the SQW frequency has been

completed, the SQW/FT pin can be turned on and off under software control with the square

wave enable bit (SQWE) located in register 0Ah.

The SQW/FT output is programmable as an N-channel, open drain output driver, or a full-

CMOS output driver. By setting the square wave open drain bit (SQWOD) to a '1,' the output

will be configured as an open drain (with I

as specified in Table 17 on page 44). When

SQWOD is set to '0,' the output will be configured as full-CMOS (sink and source current as

specified in Table 17 on page 44).

Note: When configured as open drain (SQWOD = '1'), the SQW/FT pin requires an external pull-

up resistor.

Table 9. Square wave output frequency

Square wave bits Square wave

RS3 RS2 RS1 RS0 Frequency Units

0000None–

000132.768kHz

00108.192kHz

00114.096kHz

01002.048kHz

01011.024kHz

0110512Hz

0111256Hz

1000128Hz

100164Hz

101032Hz

101116Hz

11008Hz

11014Hz

11102Hz

11111Hz