Datasheet

Clock operation M41ST87Y, M41ST87W
34/54 Doc ID 9497 Rev 10
alarm condition activates the IRQ/OUT pin as shown in Figure 25 on page 35. To disable the
alarm, write '0' to the alarm date register and to RPT5–RPT1.
If the address pointer is allowed to increment to the flag register address, an alarm condition
will not cause the interrupt/flag to occur until the address pointer is moved to a different
address. It should also be noted that if the last address written is the “alarm seconds,” the
address pointer will increment to the flag address, causing this situation to occur. Thus the
user should not leave the address pointer at 0Fh if using the alarm interrupt function. This is
easily handled by simply reading past the flags registers before teminating a read sequence.
The IRQ
/OUT output is cleared by a READ to the flags register. A subsequent READ of the
flags register is necessary to see that the value of the alarm flag has been reset to '0.'
The IRQ
/OUT pin can also be activated in the battery backup mode. The IRQ/OUT will go
low if an alarm occurs and both ABE (alarm in battery backup mode enable) and AFE are
set. The ABE and AFE bits are reset during power-up, therefore an alarm generated during
power-up will only set AF. The user can read the flag register at system boot-up to
determine if an alarm was generated while the M41ST87Y/W was in the deselect mode
during power-up. Figure 25 on page 35 illustrates the backup mode alarm timing.
Figure 24. Alarm interrupt reset waveform
Table 8. Alarm repeat modes
RPT5 RPT4 RPT3 RPT2 RPT1 Alarm setting
11111Once per second
11110Once per minute
11100Once per hour
11000Once per day
10000Once per month
00000Once per year
AI07086
IRQ/OUT
ACTIVE FLAG
0Fh0Eh 10h
HIGH-Z
ADDRESS POINTER