Datasheet

DocID007528 Rev 4 11/20
M40SZ100W Operation
20
2.2 Power-on reset output
All microprocessors have a reset input which forces them to a known state when starting.
The M40SZ100W has a reset output (RST) pin which is guaranteed to be low by V
PFD
(see
Table 7 on page 16). This signal is an open drain configuration. An appropriate pull-up
resistor to V
CC
should be chosen to control the rise time. This signal will be valid for all
voltage conditions, even when V
CC
equals V
SS
(with valid battery voltage).
Once V
CC
exceeds the power failure detect voltage V
PFD
, an internal timer keeps RST low
for t
REC
to allow the power supply to stabilize.
2.3 Reset input (RSTIN)
The M40SZ100W provides one independent input which can generate an output reset. The
duration and function of this reset is identical to a reset generated by a power cycle. Table 3
and Figure 7 illustrate the AC reset characteristics of this function. Pulses shorter than t
RLRH
will not generate a reset condition. RSTIN is internally pulled up to V
CC
through a 100 k
resistor.
Figure 7.
RSTIN timing waveform
1. With pull-up resistor
Table 3. Reset AC characteristics
2.4 Battery low pin
The M40SZ100W automatically performs battery voltage monitoring upon power-up, and at
factory-programmed time intervals of at least 24 hours. The Battery Low (BL) pin will be
asserted if the battery voltage is found to be less than approximately 2.5 V. The BL pin will
remain asserted until completion of battery replacement and subsequent battery low
monitoring tests, either during the next power-up sequence or the next scheduled 24-hour
interval.
Symbol Parameter
(1)
1. Valid for ambient operating temperature: T
A
= –40 to 85 °C; V
CC
= 2.7 to 3.6 V (except where noted).
Min Max Unit
t
RLRH
(2)
2. Pulse width less than 50 ns will result in no RESET (for noise immunity).
RSTIN low to RSTIN high 200 ns
t
R1HRH
(3)
3. C
L
= 50 pF (see Figure 9 on page 15).
RSTIN high to RST high 40 200 ms
AI04768
RST
(1)
RSTIN
tRLRH
tR1HRH