Datasheet

DocID18204 Rev 6 35/36
M24M02-DR Revision history
11 Revision history
Table 17. Document revision history
Date Revision Changes
22-Dec-2010 1 Initial release.
09-Feb-2011 2
Updated:
Section 3.18: Read Identification Page
Section 3.19: Read the lock status
Figure 2: SO8 connections
Table 6: Absolute maximum ratings
Table 10: Input parameters
Table 11: DC characteristics
Table 12: AC characteristics at 400 kHz
Table 13: 1 MHz AC characteristics
Deleted:
Table 15 “Available M24M02-x products (package, voltage range,
frequency, temperature grade)”.
09-Aug-2011 3
Updated Figure 5: Maximum R
bus
value versus bus parasitic
capacitance (C
bus
) for an I
2
C bus at maximum frequency f
C
= 1 MHz
and Table 11: DC characteristics.
07-Feb-2012 4
Updated:
Table 2: Device select code
Table 3: Most significant address byte
Table 4: Least significant address byte.
Section 3.6: Write operations
Section 3.8: Page Write
25-Oct-2012 5
Updated document template and text (minor changes).
Cycling updated to 4 million cycles and data retention updated to
200 years.
Added WLCSP packages.
04-Jun-2013 6
Document reformatted.
Removed information related to thin WLCSP package.
Updated:
WLCSP package silhouette on cover page
Section 1: Description
Figure 3: WLCSP connections
Note
(1)
under Table 5: Absolute maximum ratings.
Added Figure 17: M24M02-DR WLCSP recommended footprint.