Memory organization M24M02-DR
10/36 DocID18204 Rev 6
3 Memory organization
The memory is organized as shown below.
Figure 5. Block diagram
MS30980V1
WC
Control logic
High voltage
generator
I/O shift register
Address register
and counter
Data
register
1 page
X decoder
Y decoder
Identification page
E2
SCL
SDA
