M24C64 M24C32 64Kbit and 32Kbit Serial I²C Bus EEPROM FEATURES SUMMARY ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Two-Wire I2C Serial Interface Supports 400kHz Protocol Single Supply Voltage: – 4.5 to 5.5V for M24Cxx – 2.5 to 5.5V for M24Cxx-W – 1.8 to 5.
M24C64, M24C32 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 1. Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . .
M24C64, M24C32 Acknowledge in Read Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 INITIAL DELIVERY STATE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 7. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . .
M24C64, M24C32 SUMMARY DESCRIPTION These I2C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 8192 x 8 bits (M24C64) and 4096 x 8 bits (M24C32). Figure 2. Logic Diagram VCC 3 E0-E2 SCL SDA M24C64 M24C32 WC VSS AI01844B I2C uses a two-wire serial interface, comprising a bi-directional data line and a clock line. The devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I2C bus definition.
M24C64, M24C32 SIGNAL DESCRIPTION Serial Clock (SCL). This input signal is used to strobe all data in and out of the device. In applications where this signal is used by slave devices to synchronize the bus to a slower clock, the bus master must have an open drain output, and a pull-up resistor must be connected from Serial Clock (SCL) to VCC. (Figure 4. indicates how the value of the pull-up resistor can be calculated).
M24C64, M24C32 Figure 5. I2C Bus Protocol SCL SDA SDA Input START Condition SCL 1 2 SDA MSB SDA Change STOP Condition 3 7 8 9 ACK START Condition SCL 1 SDA MSB 2 3 7 8 9 ACK STOP Condition AI00792B Table 3. Device Select Code Device Type Identifier1 Device Select Code Chip Enable Address2 RW b7 b6 b5 b4 b3 b2 b1 b0 1 0 1 0 E2 E1 E0 RW Note: 1. The most significant bit, b7, is sent first. 2.
M24C64, M24C32 MEMORY ORGANIZATION The memory is organized as shown in Figure 6.. Figure 6.
M24C64, M24C32 DEVICE OPERATION The device supports the I2C protocol. This is summarized in Figure 5.. Any device that sends data on to the bus is defined to be a transmitter, and any device that reads the data to be a receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M24Cxx device is always a slave in all communication.
M24C64, M24C32 Figure 7. Write Mode Sequences with WC=1 (data write inhibited) WC ACK BYTE ADDR ACK BYTE ADDR NO ACK DATA IN STOP DEV SEL START BYTE WRITE ACK R/W WC ACK DEV SEL START PAGE WRITE ACK BYTE ADDR ACK BYTE ADDR NO ACK DATA IN 1 DATA IN 2 R/W WC (cont'd) NO ACK DATA IN N STOP PAGE WRITE (cont'd) NO ACK AI01120C Write Operations Following a Start condition the bus master sends a Device Select Code with the Read/Write bit (RW) reset to 0.
M24C64, M24C32 The bus master sends from 1 to 32 bytes of data, each of which is acknowledged by the device if Write Control (WC) is Low. If Write Control (WC) is High, the contents of the addressed memory location are not modified, and each data byte is followed by a NoAck. After each byte is transferred, the internal byte address counter (the 5 least significant address bits only) is incremented. The transfer is terminated by the bus master generating a Stop condition.
M24C64, M24C32 Figure 9.
M24C64, M24C32 Figure 10.
M24C64, M24C32 Sequential Read This operation can be used after a Current Address Read or a Random Address Read. The bus master does acknowledge the data byte output, and sends additional clock pulses so that the device continues to output the next byte in sequence. To terminate the stream of bytes, the bus master must not acknowledge the last byte, and must generate a Stop condition, as shown in Figure 10..
M24C64, M24C32 MAXIMUM RATING Stressing the device outside the ratings listed in Table 7. may cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the Operating sections of this specification, is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 7.
M24C64, M24C32 DC AND AC PARAMETERS This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC Characteristic tables that follow are derived from tests performed under the Measure- ment Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters. Table 8.
M24C64, M24C32 Table 11. AC Measurement Conditions Symbol CL Parameter Min. Load Capacitance Max. Unit 100 Input Rise and Fall Times pF 50 ns Input Levels 0.2VCC to 0.8VCC V Input and Output Timing Reference Levels 0.3VCC to 0.7VCC V Figure 11. AC Measurement I/O Waveform Input Levels Input and Output Timing Reference Levels 0.8VCC 0.7VCC 0.3VCC 0.2VCC AI00825B Table 12. Input Parameters Symbol Parameter1,2 Test Condition Min. Max.
M24C64, M24C32 Table 14. DC Characteristics (M24Cxx-W6 and M24Cxx-W3) Symbol Test Condition (in addition to those in Table 9.) Parameter Min. Max. Unit ILI Input Leakage Current (SCL, SDA, E2, E1, E0) VIN = VSS or VCC device in Stand-by mode ±2 µA ILO Output Leakage Current VOUT = VSS or VCC, SDA in Hi-Z ±2 µA ICC Supply Current VCC =2.5V, fc=400kHz (rise/fall time < 30ns) 1 mA ICC1 Stand-by Supply Current VIN = VSS or VCC, VCC = 2.5 V 2 µA VIL Input Low Voltage –0.45 0.
M24C64, M24C32 Table 16. AC Characteristics (M24Cxx-6, M24Cxx-W6 and M24Cxx-W3) Test conditions specified in Table 11. and Table 8. or Table 9. Symbol Alt. Parameter Min. Max.
M24C64, M24C32 Figure 12.
M24C64, M24C32 PACKAGE MECHANICAL Figure 13. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline E b2 A2 A1 b A L c e eA eB D 8 E1 1 PDIP-B Note: Drawing is not to scale. Table 18. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data millimeters inches Symbol Typ. Min. A Typ. Min. 5.33 A1 Max. 0.210 0.38 0.015 A2 3.30 2.92 4.95 0.130 0.115 0.195 b 0.46 0.36 0.56 0.018 0.014 0.022 b2 1.52 1.14 1.78 0.060 0.045 0.070 c 0.25 0.20 0.36 0.
M24C64, M24C32 Figure 14. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline h x 45˚ A C B CP e D N E H 1 A1 α L SO-a Note: Drawing is not to scale. Table 19. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data millimeters inches Symbol Typ. Min. Max. A 1.35 A1 Min. Max. 1.75 0.053 0.069 0.10 0.25 0.004 0.010 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.
M24C64, M24C32 Figure 15. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline D 8 5 c E1 1 E 4 α A1 A L A2 L1 CP b e TSSOP8AM Note: Drawing is not to scale. Table 20. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data mm inches Symbol Typ. Min. A 0.050 0.150 0.800 1.050 b 0.190 c 0.090 A2 Typ. Min. 1.200 A1 1.000 CP Max. 0.0472 0.0020 0.0059 0.0315 0.0413 0.300 0.0075 0.0118 0.200 0.0035 0.0079 0.0394 0.100 0.0039 D 3.000 2.900 3.
M24C64, M24C32 Figure 16. UFDFPN8 (MLP8) – 8-lead Ultra thin Fine pitch Dual Flat Package No lead 2x3mm e D b L1 L3 E E2 L A D2 ddd A1 UFDFPN-01 Note: Drawing is not to scale. Table 21. UFDFPN8 (MLP8) – 8-lead Ultra thin Fine pitch Dual Flat Package No lead 2x3mm, Package Mechanical Data millimeters inches Symbol A Typ Min Max Typ Min Max 0.55 0.50 0.60 0.022 0.020 0.024 0.00 0.05 0.000 0.002 0.20 0.30 0.008 0.012 0.061 0.065 A1 b 0.25 D 2.00 D2 0.079 1.55 ddd E 0.
M24C64, M24C32 PART NUMBERING Table 22. Ordering Information Scheme Example: M24C32 – W MN 6 T P Device Type M24 = I2C serial access EEPROM Device Function 64 = 64 Kbit (8192 x 8) 32 = 32 Kbit (4096 x 8) Operating Voltage blank(2) = VCC = 4.5 to 5.5V W = VCC = 2.5 to 5.5V R = VCC = 1.8 to 5.
M24C64, M24C32 REVISION HISTORY Table 23. Document Revision History Date Rev. Description of Revision 22-Dec-1999 2.3 TSSOP8 package in place of TSSOP14 (pp 1, 2, OrderingInfo, PackageMechData). 28-Jun-2000 2.4 TSSOP8 package data corrected 31-Oct-2000 2.5 References to Temperature Range 3 removed from Ordering Information Voltage range -S added, and range -R removed from text and tables throughout. 20-Apr-2001 2.
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