Datasheet
Memory organization M24C32-W M24C32-R M24C32-F M24C32-X M24C32-DF
10/40 Doc ID 4578 Rev 21
3 Memory organization
The memory is organized as shown below.
Figure 4. Block diagram
-36
7#
#ONTROLLOGIC
(IGHVOLTAGE
GENERATOR
)/SHIFTREGISTER
!DDRESSREGISTER
ANDCOUNTER
$ATA
REGISTER
PAGE
8DECODER
9DECODER
)DENTIFICATIONPAGE
%
%
3#,
3$!