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Table Of Contents

This is information on a product in full production.

December 2013 DocID023924 Rev 3 1/40

M24C08-W M24C08-R

M24C08-F

8-Kbit serial I²C bus EEPROM

Datasheet - production data

1. Not recommended for new designs

Features

• Compatible with all I

C bus modes:

– 400 kHz

– 100 kHz

• Memory array:

– 8 Kbit (1 Kbyte) of EEPROM

– Page size: 16 bytes

• Single supply voltage:

– M24C08-W: 2.5 V to 5.5 V

– M24C08-R: 1.8 V to 5.5 V

– M24C08-F: 1.7 V to 5.5 V (full temperature

range) and 1.6 V to1.7 V (limited

temperature range)

• Write:

– Byte Write within 5 ms

– Page Write within 5 ms

• Operating temperature range: from -40 °C up

to +85 °C

• Random and sequential Read modes

• Write protect of the whole memory array

• Enhanced ESD/Latch-Up protection

• More than 4 million Write cycles

• More than 200-year data retention

Packages

• PDIP8 ECOPACK1

• SO8 ECOPACK2

• TSSOP8 ECOPACK2

• UFDFPN8 ECOPACK2

• WLCSP ECOPACK2

PDIP8 (BN)

SO8 (MN)

150 mil width

TSSOP8 (DW)

169 mil width

UFDFPN8

(MC)

WLCSP (CS, CT)

(1)

www.st.com

Summary of content (40 pages)

PAGE 1
M24C08-W M24C08-R M24C08-F 8-Kbit serial I²C bus EEPROM Datasheet - production data Features • Compatible with all I2C bus modes: – 400 kHz – 100 kHz TSSOP8 (DW) 169 mil width • Memory array: – 8 Kbit (1 Kbyte) of EEPROM – Page size: 16 bytes • Single supply voltage: – M24C08-W: 2.5 V to 5.5 V – M24C08-R: 1.8 V to 5.5 V – M24C08-F: 1.7 V to 5.5 V (full temperature range) and 1.6 V to1.
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Contents M24C08-W M24C08-R M24C08-F Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Serial Clock (SCL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Serial Data (SDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.
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M24C08-W M24C08-R M24C08-F Contents 6 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 8 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 10 Part numbering . . . . . . . . . . . . .
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List of tables M24C08-W M24C08-R M24C08-F List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. 4/40 Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Device select code . . . . . . . . . . . . . . . . . . . . . . . . . .
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M24C08-W M24C08-R M24C08-F List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 8-pin package connections, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Description 1 M24C08-W M24C08-R M24C08-F Description The M24C08 is an 8-Kbit I2C-compatible EEPROM (Electrically Erasable PROgrammable Memory) organized as 1 K × 8 bits. The M24C08-W can be accessed with a supply voltage from 2.5 V to 5.5 V, the M24C08-R can be accessed with a supply voltage from 1.8 V to 5.5 V, and the M24C08-F can be accessed either with a supply voltage from 1.7 V to 5.5 V (over the full temperature range) or with an extended supply voltage from 1.6 V to 1.7 V.
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M24C08-W M24C08-R M24C08-F Description Figure 3. WLCSP connections (top view, marking side, with balls on the underside) 6## 7# 3$! 3#, 633 AI 1. The E2 input is not connected to a ball, therefore E2 input is decoded as “0” (see also Section 2.3: Chip Enable (E2)). Caution: As EEPROM cells lose their charge (and so their binary value) when exposed to ultra violet (UV) light, EEPROM dice delivered in wafer form or in WLCSP package by STMicroelectronics must never be exposed to UV light.
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Signal description M24C08-W M24C08-R M24C08-F 2 Signal description 2.1 Serial Clock (SCL) The signal applied on the SCL input is used to strobe the data available on SDA(in) and to output the data on SDA(out). 2.2 Serial Data (SDA) SDA is an input/output used to transfer data in or data out of the device. SDA(out) is an open drain output that may be wire-OR’ed with other open drain or open collector signals on the bus.
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M24C08-W M24C08-R M24C08-F Signal description 2.6 Supply voltage (VCC) 2.6.1 Operating supply voltage (VCC) Prior to selecting the memory and issuing instructions to it, a valid and stable VCC voltage within the specified [VCC(min), VCC(max)] range must be applied (see Operating conditions in Section 8: DC and AC parameters).
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Memory organization 3 M24C08-W M24C08-R M24C08-F Memory organization The memory is organized as shown below. Figure 5.
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M24C08-W M24C08-R M24C08-F 4 Device operation Device operation The device supports the I2C protocol. This is summarized in Figure 6. Any device that sends data on to the bus is defined to be a transmitter, and any device that reads the data to be a receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization.
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Device operation 4.1 M24C08-W M24C08-R M24C08-F Start condition Start is identified by a falling edge of Serial Data (SDA) while Serial Clock (SCL) is stable in the high state. A Start condition must precede any data transfer instruction. The device continuously monitors (except during a Write cycle) Serial Data (SDA) and Serial Clock (SCL) for a Start condition. 4.2 Stop condition Stop is identified by a rising edge of Serial Data (SDA) while Serial Clock (SCL) is stable and driven high.
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M24C08-W M24C08-R M24C08-F 4.5 Device operation Device addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 2 (on Serial Data (SDA), most significant bit first). Table 2. Device select code Device type identifier(1) Chip Enable address RW b7 b6 b5 b4 b3 b2 b1 b0 1 0 1 0 E2 A9 A8 RW 1. The most significant bit, b7, is sent first.
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Instructions M24C08-W M24C08-R M24C08-F 5 Instructions 5.1 Write operations Following a Start condition the bus master sends a device select code with the R/W bit (RW) reset to 0. The device acknowledges this, as shown in Figure 7, and waits for the address byte. The device responds to each address byte with an acknowledge bit, and then waits for the data byte. Table 3.
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M24C08-W M24C08-R M24C08-F Byte Write After the device select code and the address byte, the bus master sends one data byte. If the addressed location is Write-protected, by Write Control (WC) being driven high, the device replies with NoAck, and the location is not modified. If, instead, the addressed location is not Write-protected, the device replies with Ack. The bus master terminates the transfer by generating a Stop condition, as shown in Figure 7. Figure 7.
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Instructions 5.1.2 M24C08-W M24C08-R M24C08-F Page Write The Page Write mode allows up to 16 bytes to be written in a single Write cycle, provided that they are all located in the same page in the memory: that is, the most significant memory address bits, A9/A4, are the same. If more bytes are sent than will fit up to the end of the page, a “roll-over” occurs, i.e. the bytes exceeding the page end are written on the same page, from location 0.
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M24C08-W M24C08-R M24C08-F 5.1.3 Instructions Minimizing Write delays by polling on ACK The maximum Write time (tw) is shown in AC characteristics tables in Section 8: DC and AC parameters, but the typical time is shorter. To make use of this, a polling sequence can be used by the bus master. The sequence, as shown in Figure 9, is: • Initial condition: a Write cycle is in progress.
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Instructions 5.2 M24C08-W M24C08-R M24C08-F Read operations Read operations are performed independently of the state of the Write Control (WC) signal. After the successful completion of a Read operation, the device internal address counter is incremented by one, to point to the next byte address. For the Read instructions, after each byte read (data out), the device waits for an acknowledgment (data in) during the 9th bit time.
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M24C08-W M24C08-R M24C08-F 5.2.1 Initial delivery state Random Address Read A dummy Write is first performed to load the address into this address counter (as shown in Figure 10) but without sending a Stop condition. Then, the bus master sends another Start condition, and repeats the device select code, with the RW bit set to 1. The device acknowledges this, and outputs the contents of the addressed byte. The bus master must not acknowledge the byte, and terminates the transfer with a Stop condition. 5.
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Maximum rating 7 M24C08-W M24C08-R M24C08-F Maximum rating Stressing the device outside the ratings listed in Table 4 may cause permanent damage to the device. These are stress ratings only, and operation of the device at these, or any other conditions outside those indicated in the operating sections of this specification, is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4.
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M24C08-W M24C08-R M24C08-F 8 DC and AC parameters DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. Table 5. Operating conditions (voltage range W) Symbol Min. Max. Unit Supply voltage 2.5 5.5 V TA Ambient operating temperature –40 85 °C fC Operating clock frequency - 400 kHz Min. Max. Unit Supply voltage 1.8 5.
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DC and AC parameters M24C08-W M24C08-R M24C08-F Table 9. AC measurement conditions Symbol Cbus Parameter Min. Load capacitance Max. Unit 100 SCL input rise/fall time, SDA input fall time - pF 50 ns Input levels 0.2 VCC to 0.8 VCC V Input and output timing reference levels 0.3 VCC to 0.7 VCC V Figure 11. AC measurement I/O waveform )NPUT VOLTAGE LEVELS )NPUT AND OUTPUT 4IMING REFERENCE LEVELS 6## 6## 6## 6## -3 6 Table 10. Input parameters Symbol Parameter(1) Min.
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M24C08-W M24C08-R M24C08-F DC and AC parameters Table 11. Cycling performance Symbol Parameter Ncycle Write cycle endurance Test condition(1) Max. TA ≤ 25 °C, VCC(min) < VCC < VCC(max) 4,000,000 TA = 85 °C, VCC(min) < VCC < VCC(max) 1,200,000 Unit Write cycle 1. Cycling performance for products identified by process letter T. Table 12. Memory cell data retention Parameter Data retention(1) Test condition TA = 55 °C Min. Unit 200 Year 1. For products identified by process letter T.
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DC and AC parameters M24C08-W M24C08-R M24C08-F Table 13. DC characteristics (M24C08-W, device grade 6) Symbol Parameter ILI Input leakage current (SCL, SDA) ILO Output leakage current ICC Supply current (Read) ICC0 Supply current (Write) ICC1 Standby supply current Test conditions (in addition to those in Table 5 and Table 9) Min. Max. Unit VIN = VSS or VCC, device in Standby mode - ±2 µA SDA in Hi-Z, external voltage applied on SDA: VSS or VCC - ±2 µA VCC = 5.
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M24C08-W M24C08-R M24C08-F DC and AC parameters Table 14. DC characteristics (M24C08-R, device grade 6) Symbol Test conditions(1) (in addition to those in Table 6 and Table 9) Parameter Min. Max. Unit ILI Input leakage current (Ei , SCL, SDA) VIN = VSS or VCC, device in Standby mode - ±2 µA ILO Output leakage current SDA in Hi-Z, external voltage applied on SDA: VSS or VCC - ±2 µA ICC Supply current (Read) VCC = 1.8 V, fc= 400 kHz - 0.
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DC and AC parameters M24C08-W M24C08-R M24C08-F Table 15. DC characteristics (M24C08-F device) Symbol Test conditions(1) (in addition to those in Table 7, Table 8 and Table 9) Parameter Min. Max. Unit ILI Input leakage current (Ei,SCL, SDA) VIN = VSS or VCC, device in Standby mode - ±2 µA ILO Output leakage current VOUT = VSS or VCC, SDA in Hi-Z - ±2 µA ICC Supply current (Read) VCC = 1.6 V(2) or 1.7 V, fc= 400 kHz - 0.
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M24C08-W M24C08-R M24C08-F DC and AC parameters Table 16. 400 kHz AC characteristics Symbol Alt. fC fSCL Clock frequency tCHCL tHIGH tCLCH tLOW tQL1QL2(1) tF tXH1XH2 tR Parameter Min. Max.
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DC and AC parameters M24C08-W M24C08-R M24C08-F Table 17. 100 kHz AC characteristics (I2C Standard mode)(1) Symbol Alt. fC fSCL tCHCL Parameter Min. Max. Unit Clock frequency - 100 kHz tHIGH Clock pulse width high 4 - µs tCLCH tLOW Clock pulse width low 4.
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M24C08-W M24C08-R M24C08-F DC and AC parameters Figure 12. Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C bus at maximum frequency fC = 400 kHz "US LINE PULL UP RESISTOR K 4HE 2 BUS X #BUS TIME CONSTANT MUST BE BELOW THE NS TIME CONSTANT LINE REPRESENTED ON THE LEFT 2 BU S § # BU S (ERE 2BUS § #BUS NS 6## 2BUS N K½ S )£# BUS MASTER 3#, - XXX 3$! P& "US LINE CAPACITOR P& #BUS AI B Figure 13.
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Package mechanical data 9 M24C08-W M24C08-R M24C08-F Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 14. TSSOP8 – 8-lead thin shrink small outline, package outline 1. Drawing is not to scale. Table 18.
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M24C08-W M24C08-R M24C08-F Package mechanical data Figure 15. SO8N – 8-lead plastic small outline, 150 mils body width, package outline K [ $ $ F FFF E H PP *$8*( 3/$1( ' N ( ( / $ / 62 $ 1. Drawing is not to scale. Table 19. SO8N – 8-lead plastic small outline, 150 mils body width, package data inches (1) millimeters Symbol Typ Min Max Typ Min Max A – – 1.750 – – 0.0689 A1 – 0.100 0.250 – 0.0039 0.0098 A2 – 1.250 – – 0.0492 – b – 0.280 0.
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Package mechanical data M24C08-W M24C08-R M24C08-F Figure 16. PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline % B ! ! B ! , C E E! E" $ % 0$)0 " 1. Drawing is not to scale. 2. Not recommended for new designs. Table 20. PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package mechanical data inches(1) millimeters Symbol Typ. Min. Max. Typ. Min. Max. A – – 5.33 – – 0.2098 A1 – 0.38 – – 0.0150 – A2 3.30 2.92 4.95 0.1299 0.1150 0.1949 b 0.46 0.36 0.
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M24C08-W M24C08-R M24C08-F Package mechanical data Figure 17. UFDFPN8 (MLP8) – package outline (UFDFPN: Ultra thin Fine pitch Dual Flat Package, No lead) Ğ D ď >ϭ >ϯ WŝŶ ϭ Ϯ < > Ϯ ĞĞĞ ϭ tͺD ĞsϮ 1. Drawing is not to scale. 2. The central pad (area E2 by D2 in the above illustration) is internally pulled to VSS. It must not be connected to any other voltage or signal line on the PCB, for example during the soldering process. Table 21.
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Package mechanical data M24C08-W M24C08-R M24C08-F Figure 18. M24C08-FCS5TP/S WLCSP package outline /RIENTATION REFERENCE /RIENTATION REFERENCE BBB : $ E X 9 E ' ! $ETAIL ! % E " # & ! ! 7AFER BACK SIDE 3IDE VIEW "UMP SIDE "UMP $ETAIL ! ROTATED BY ! CCC DDD - : 89 - : B #K?-%?6 1. Drawing is not to scale.
PAGE 35
M24C08-W M24C08-R M24C08-F Package mechanical data Table 22. M24C08-FCS5TP/S WLCSP package data inches(1) millimeters Symbol Typ Min Max Typ Min Max A 0.545 0.490 0.600 0.0215 0.0192 0.0236 A1 0.190 – – 0.0075 – – A2 0.355 – – 0.0140 – – b 0.270 – – 0.0106 – – D 1.215 – 1.340 0.0478 – 0.0528 E 1.025 – 1.150 0.0404 – 0.0453 e 0.400 – – 0.0157 – – e1 0.693 – – 0.0273 – – e2 0.346 – – 0.0136 – – F 0.313 – – 0.0123 – – G 0.
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Package mechanical data M24C08-W M24C08-R M24C08-F Figure 19. Thin M24C08-FCT5TP/S WLCSP package outline /RIENTATION REFERENCE /RIENTATION REFERENCE BBB : E $ X 9 E ' ! $ETAIL ! % E " # & ! ! 3IDE VIEW 7AFER BACK SIDE "UMP SIDE "UMP $ETAIL ! ROTATED BY ! CCC DDD - : 89 - : B 6?-%?6 1. Drawing is not to scale.
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M24C08-W M24C08-R M24C08-F Package mechanical data Table 23. Thin M24C08-FCT5TP/S WLCSP package data inches(1) millimeters Symbol Typ Min Max Typ Min Max A 0.300 0.270 0.330 0.0118 0.0106 0.0130 A1 0.100 – – 0.0039 – – A2 0.200 – – 0.0079 – – b 0.160 – – 0.0063 – – D 1.215 – 1.340 0.0478 – 0.0528 E 1.025 – 1.150 0.0404 – 0.0453 e 0.400 – – 0.0157 – – e1 0.693 – – 0.0273 – – e2 0.346 – – 0.0136 – – F 0.313 – – 0.0123 – – G 0.
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Part numbering 10 M24C08-W M24C08-R M24C08-F Part numbering Table 24. Ordering information scheme Example: M24C08 Device type M24 = I2C serial access EEPROM Device function C08 = 8 Kbit (1 K x 8 bit) Operating voltage W = VCC = 2.5 V to 5.5 V R = VCC = 1.8 V to 5.5 V F = VCC = 1.6 V or 1.7 V to 5.
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M24C08-W M24C08-R M24C08-F 11 Revision history Revision history Table 25. Document revision history Date Revision 17-Dec-2012 1 New single product M24C08 datasheet resulting from splitting the previous datasheet M24C08-x M24C04-x M24C02-x M24C01-x (revision 18) into separate datasheets. 2 Added: – Table 11: Cycling performance – Table 7: Operating conditions (voltage range F, for devices identified by process letter T) and Table 8: Operating conditions (voltage range F, for all other devices).
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M24C08-W M24C08-R M24C08-F Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.