Datasheet
Table Of Contents
- 1 Description
- 2 Signal description
- 3 Memory organization
- 4 Device operation
- 5 Instructions
- 6 Initial delivery state
- 7 Maximum rating
- 8 DC and AC parameters
- Table 5. Operating conditions (voltage range W)
- Table 6. Operating conditions (voltage range R)
- Table 7. Operating conditions (voltage range F, for devices identified by process letter T)
- Table 8. Operating conditions (voltage range F, for all other devices)
- Table 9. AC measurement conditions
- Figure 9. AC measurement I/O waveform
- Table 10. Input parameters
- Table 11. Cycling performance
- Table 12. Memory cell data retention
- Table 13. DC characteristics (M24C04-W, device grade 6)
- Table 14. DC characteristics (M24C04-R, device grade 6)
- Table 15. DC characteristics (M24C04-F device, grade 6 and grade 5)
- Table 16. 400 kHz AC characteristics
- Table 17. 100 kHz AC characteristics (I2C Standard mode)
- Figure 10. Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C bus at maximum frequency fC = 400 kHz
- Figure 11. AC waveforms
- 9 Package mechanical data
- Figure 12. TSSOP8 – 8-lead thin shrink small outline, package outline
- Table 18. TSSOP8 – 8-lead thin shrink small outline, package mechanical data
- Figure 13. SO8N – 8-lead plastic small outline, 150 mils body width, package outline
- Table 19. SO8N – 8-lead plastic small outline, 150 mils body width, package data
- Figure 14. PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline
- Table 20. PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package mechanical data
- Figure 15. UFDFPN8 (MLP8) – package outline (UFDFPN: Ultra thin Fine pitch Dual Flat Package, No lead)
- Table 21. UFDFPN8 (MLP8) – package dimensions (UFDFPN: Ultra thin Fine pitch Dual Flat Package, No lead)
- 10 Part numbering
- 11 Revision history

DocID023994 Rev 3 7/34
M24C04-W M24C04-R M24C04-F Signal description
33
2 Signal description
2.1 Serial Clock (SCL)
The signal applied on the SCL input is used to strobe the data available on SDA(in) and to
output the data on SDA(out).
2.2 Serial Data (SDA)
SDA is an input/output used to transfer data in or data out of the device. SDA(out) is an
open drain output that may be wire-OR’ed with other open drain or open collector signals on
the bus. A pull-up resistor must be connected from Serial Data (SDA) to V
CC
(Figure 10
indicates how to calculate the value of the pull-up resistor).
2.3 Chip Enable (E1, E2)
These input signals are used to set the value that is to be looked for on the two bits (b3, b2)
of the 7-bit device select code. These inputs must be tied to V
CC
or V
SS
to establish the
device select code as shown in
Table 2. When not connected (left floating), these inputs are
read as low (0,0).
2.4 Write Control (WC)
This input signal is useful for protecting the entire contents of the memory from inadvertent
write operations. Write operations are disabled to the entire memory array when Write
Control (
WC) is driven high. Write operations are enabled when Write Control (WC) is either
driven low or left floating.
When Write Control (WC) is driven high, device select and address bytes are
acknowledged, Data bytes are not acknowledged.
2.5 V
SS
(ground)
V
SS
is the reference for the V
CC
supply voltage.