Datasheet

DocID16892 Rev 24 5/39
M24128-BW M24128-BR M24128-BF M24128-DF List of figures
5
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. 8-pin package connections, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. WLCSP connections for the M24128-DFCS6TP/K
(top view, marking side, with balls on the underside) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Chip enable inputs connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. I
2
C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 7. Write mode sequences with WC
= 0 (data write enabled) . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 8. Write mode sequences with WC
= 1 (data write inhibited) . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Write cycle polling flowchart using ACK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 10. Read mode sequences. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 11. AC measurement I/O waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 12. Maximum R
bus
value versus bus parasitic capacitance (C
bus
) for
an I
2
C bus at maximum frequency f
C
= 400 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 13. Maximum R
bus
value versus bus parasitic capacitance C
bus
) for
an I
2
C bus at maximum frequency f
C
= 1MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 14. AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 15. TSSOP8 – 8-lead thin shrink small outline, package outline . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 16. SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 33
Figure 17. UFDFPN8 (MLP8) – package outline (UFDFPN: Ultra thin Fine pitch
Dual Flat Package, No lead). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 18. M24128-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package outline . . . . . . . . 35