Datasheet

Application information LNBH25L
8/28 Doc ID 022634 Rev 2
2.10 OLF: overcurrent and short-circuit protection and diagnostic
In order to reduce the total power dissipation during an overload or a short-circuit condition,
the device is provided with a dynamic short-circuit protection. It is possible to set the short-
circuit current protection either statically (simple current clamp) or dynamically by the PCL
bit of the I²C DATA3 register. When the PCL (pulsed current limiting) bit is set to LOW, the
overcurrent protection circuit works dynamically: as soon as an overload is detected, the
output current is provided for a T
ON
time of 90 ms, after which the output is set in shutdown
for a T
OFF
time of typically 900 ms. Simultaneously, the diagnostic OLF I²C bit of the system
register is set to “1”. After this time has elapsed, the output is resumed for a time T
ON
. At the
end of T
ON
, if the overload is still detected, the protection circuit cycles again through T
OFF
and T
ON
. At the end of a full T
ON
in which no overload is detected, normal operation is
resumed and the OLF diagnostic bit is reset to LOW after a register reading is done. Typical
T
ON
+ T
OFF
time is 990 ms and an internal timer determines it. This dynamic operation can
greatly reduce the power dissipation in a short-circuit condition, still ensuring excellent
power-on startup in most conditions. However, there may be some cases in which a highly
capacitive load on the output can cause a difficult startup when the dynamic protection is
chosen. This can be solved by initiating any power startup in static mode (PCL=1) and then
switching to the dynamic mode (PCL=0) after a chosen amount of time depending on the
output capacitance. Also in static mode, the diagnostic OLF bit goes to “1” when the current
clamp limit is reached and returns LOW when the overload condition is cleared and a
register reading is done.
After the overload condition is removed, normal operation can be resumed in two ways,
according to the OLR I²C bit on the DATA4 register.
If OLR=1, all VSEL 1..4 bits are reset to “0” and LNB output (V
OUT
pin) is disabled. To re-
enable the output stage, the VSEL bits must be set again by the microprocessor, and the
OLF bit is reset to “0” after a register reading operation.
If OLR=0, output is automatically re-enabled as soon as the overload condition is removed,
and the OLF bit is reset to “0” after a register reading operation.
2.11 OTF: thermal protection and diagnostic
The LNBH25L is also protected against overheating: when the junction temperature
exceeds 150 °C (typ.), the step-up converter and the linear regulator are shut off, the
diagnostic OTF bit in the STATUS1 register is set to “1”. After the overtemperature condition
is removed, normal operation can be resumed in two ways, according to the THERM I²C bit
on the DATA4 register.
If THERM=1, all VSEL 1..4 bits are reset to “0” and LNB output (V
OUT
pin) is disabled. To re-
enable the output stage, the VSEL bits must be set again by the microprocessor, while the
OTF bit is reset to “0” after a register reading operation.
If THERM=0, output is automatically re-enabled as soon as the overtemperature condition is
removed, while the OTF bit is reset to “0” after a register reading operation.