Datasheet
I²C interface protocol LNBH25L
16/28 Doc ID 022634 Rev 2
7.2 Read mode transmission
In read mode the bytes sequence must be as follows:
● a start condition (S)
● a chip address byte with the LSB bit R/W=0
● the register address byte of the internal first register to be accessed
● a stop condition (P)
● a new master transmission with the chip address byte and the LSB bit R/W=1
● after the acknowledge the LNBH25L starts to send the addressed register content. As
long as the master keeps the acknowledge LOW, the LNBH25L transmits the next
address register byte content.
● the transmission is terminated when the master sets the acknowledge HIGH with a
following stop bit.
Figure 11. Example of reading procedure starting with first status address 0X0
(b)
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, set the values to select the CHIP ADDRESS (see
Ta bl e 1 5
for pin selection) and to
select the REGISTER ADDRESS (see
Tabl e 6
to
Tabl e 11
).
b. The reading procedure can start from any register address (Status 1, 2 or Data1..4) by simply setting the X
values in the register address byte (after the first chip address in the above figure). It can be also stopped from
the master by sending a stop condition after any acknowledge bit.
AM10464v1
S 000100X
R/W = 0
ACK
00000XXX
ACK
P
N/A
N/A
N/A
N/A
VSEL4
VSEL3
VSEL2
VSEL1
ACK
N/A
N/A
N/A
N/A
N/A
EXTM
N/A
TEN
ACK
N/A
N/A
N/A
N/A
N/A
PCL
N/A
N/A
ACK
N/A
THERM
N/A
N/A
OLR
N/A
N/A
N/A
ACK
P
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
ACK
PNG
OTF
N/A
N/A
N/A
N/A
N/A
OLF
ACK
MSB LSB
DATA 1
Add=0x2
MSB LSB
DATA 2
Add=0x3
MSB LSB
DATA 3
Add=0x4
MSB LSB
DATA 4
Add=0x5
MSB LSB
STATUS 2
Add=0x1
MSB LSB
STATUS 1
Add=0x0
S000100X
R/W = 1
ACK
MSB
LSB
CHIP ADDRESS
MSB
LSB
REGISTER ADDRESS
MSB
LSB
CHIP ADDRESS