Datasheet
LNBH23 Pin configuration
Doc ID 13356 Rev 8 9/32
3 Pin configuration
Figure 3. Pin connections (top view for PowerSSO-24, bottom view for QFN32)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
NC
ISEL
VUP
NC
VoTX
VoRX
A-GND
VCC
VCC-L
BYP
DETIN
NC
VCTRL
NC
LX
P-GND
SDA
SCL
ADDR
DSQOUT
DSQIN
NC
14
13
TTX
EXTM
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
NC
ISEL
VUP
NC
VoTX
VoRX
A-GND
VCC
VCC-L
BYP
DETIN
NC
VCTRL
NC
LX
P-GND
SDA
SCL
ADDR
DSQOUT
DSQIN
NC
14
13
TTX
EXTM
QFN32 (5 x 5 mm.)
PowerSSO-24
Table 2. Pin description
Pin n° for
QFN32
Pin n° for
PSSO-24
Symbol Name Function
19 17 V
CC
Supply input 8 to 15 V IC DC-DC power supply.
18 16 V
CC–L
Supply input 8 to 15 V analog power supply.
4 6 LX N-MOS drain Integrated N-Channel power MOSFET drain.
27 22 V
UP
Step-Up voltage
Input of the linear post-regulator. The voltage on this pin is
monitored by the internal step-up controller to keep a
minimum dropout across the linear pass transistor.
21 19 V
oRX
LDO output port
Output of the integrated low drop linear post-regulator. See
truth tables for voltage selections and description.
22 20 V
oTX
Output port for 22
kHz tone TX
TX Output to the LNB. See truth tables for selection.
6 8 SDA Serial data Bi-directional data from/to I²C bus.
9 9 SCL Serial clock Clock from I²C bus.
12 12 DSQIN DiSEqC input
This pin will accept the DiSEqC code from the main
microcontroller. The LNBH23 will use this code to modulate
the internally generated 22 kHz carrier. Set to ground if not
used.
14 14 TTX TTX enable
This pin can be used, as well as the TTX I²C bit of the system
register, to control the TTX function enable before to start the
22 kHz tone transmission. Set floating or to GND if not used.
29 1 DETIN
Tone decoder
input
22 kHz tone decoder Input, must be AC coupled to the
DiSEqC 2.0 bus.