Datasheet

LNBH23 software description LNBH23
16/32 Doc ID 13356 Rev 8
7 LNBH23 software description
7.1 Interface protocol
The interface protocol comprises:
A start condition (S)
A chip address byte (the LSB bit determines read(=1)/write(=0) transmission)
A sequence of data (1 byte + acknowledge)
A stop condition (P)
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, two selectable addresses available through ADDR pin (see Address pin
characteristics
Tabl e 10
)
7.2 System register (SR, 1 byte)
Write = control bits functions in write mode
Read= diagnostic bits in read mode.
All bits reset to 0 at power On
7.3 Transmitted data (I²C bus write mode)
When the R/W bit in the chip address is set to 0, the main MCU can write on the system
register (SR) of the LNBH23 via I²C bus. All and 8 bits are available and can be written by
the MCU to control the device functions as per the below truth table.
Chip address Data
MSB LSB MSB LSB
S000101XR/WACK ACKP
Mode MSB LSB
Write PCL TTX TEN LLC VSEL EN ITEST AUX
Read IMON VMON TMON LLC VSEL EN OTF OLF