Datasheet

Pin configuration LNBH23
10/32 Doc ID 13356 Rev 8
Pin n° for
QFN32
Pin n° for
PSSO-24
Symbol Name Function
11 11 DSQOUT DiSEqC output
Open drain output of the tone decoder to the main
microcontroller for DiSEqC 2.0 data decoding. It is LOW
when tone is detected on DETIN pin.
13 13 EXTM
External
modulation
External modulation logic input pin which activates the 22
kHz tone output on the V
oTX
pin. Set to ground if not used.
15 15 BYP
By-pass
capacitor
Needed for internal pre-regulator filtering. The BYP pin is
intended only to connect an external ceramic capacitor. Any
connection of this pin to external current or voltage sources
may cause permanent damage to the device.
10 10 ADDR Address setting
Two I²C bus addresses available by setting the Address pin
level voltage. See address pin characteristics
Ta bl e 10
28 23 ISEL Current selection
The resistor “RSEL” connected between ISEL and GND
defines the linear regulator current limit threshold by the
equation: Imax(typ.)=10000/ RSEL.
30 2 VCTRL
Output voltage
control
13V-18V linear regulator V
oRX
switch control. To be used
only with V
SEL
=1. If VCTRL=1 or floating V
oRX
=18.5V (or
19.5V if LLC=1). If VCTRL=0 than V
oRX
=13.4V (LLC=either 0
or 1). Leave floating if not used. Do not connect to ground if
not used.
5 7 P-GND Power ground DC-DC converter power ground.
Epad Epad Epad Exposed pad
To be connected with power grounds and to the ground layer
through vias to dissipate the heat.
20 18 A-GND Analog ground Analog circuits ground.
1, 2, 3, 7,
8, 16, 17,
23, 24,
25, 26,
31, 32
3, 4, 5,
21, 24
N.C. Not connected Not internally connected pins.
Table 2. Pin description (continued)