Datasheet

LNBH23L software description LNBH23L
16/25 Doc ID 15335 Rev 4
7 LNBH23L software description
7.1 Interface protocol
The interface protocol comprises:
● A start condition (S)
● A chip address byte (the LSB bit determines read (=1)/write (=0) transmission)
● A sequence of data (1 byte + acknowledge)
● A stop condition (P)
ACK = Acknowledge
S = Start
P = Stop
R/W = 1/0, Read/Write bit
X = 0/1, two addresses selectable by ADDR pin (see Ta bl e 1 0)
7.2 System register (SR, 1 byte)
Write = control bits functions in write mode
Read= diagnostic bits in read mode.
All bits reset to 0 at Power-on
7.3 Transmitted data (I²C bus write mode)
When the R/W bit in the chip address is set to 0, the main microprocessor can write on the
system register (SR) of the LNBH23L via I²C bus. 6 bits are available and can be written by
the microprocessor to control the device functions as per the below truth table Ta bl e 6 .
Section address (A or B) Data
MSB LSB MSB LSB
S 0 0 0 1 0 1 X R/W ACK ACK P
Mode MSB LSB
Write PCL TTX TEN LLC VSEL EN TEST4 TEST5
Read TEST1 TEST2 TEST3 LLC VSEL EN OTF OLF