Datasheet

LNBH21
7/20
Figure 2 : TIMING DIAGRAM ON I
2
CBUS
Figure 3 : ACKNOWLEDGE ON I
2
CBUS
LNBH21 SOFTWARE DESCRIPTION
INTERFACE PROTOCOL
The interface protocol comprises:
- A start condition (S)
- A chip address byte = hex 10 / 11 (the LSB bit determines read(=1)/write(=0) transmission)
- A sequence of data (1 byte + acknowledge)
- A stop condition (P)
ACK= Acknowledge; S = Start ; P = Stop; R/W = Read/Write
SYSTEM REGISTER (SR, 1 BYTE)
R,W = read and write bit; R = Read-only bit
All bits reset to 0 at Power-On
CHIP ADDRESS DATA
MSB LSB MSB LSB
S0001000R/WACK ACKP
MSB LSB
R, W R, W R, W R, W R, W R, W R R
PCL TTX TEN LLC VSEL EN OTF OLF