Datasheet
Table Of Contents
- Figure 1. Typical application circuit
- 1 Pin settings
- 2 Maximum ratings
- 3 Electrical characteristics
- 4 Functional description
- 5 Application notes - buck conversion
- 5.1 Closing the loop
- 5.2 GCO(s) control to output transfer function
- 5.3 Error amplifier compensation network
- 5.4 LED small signal model
- 5.5 Total loop gain
- 5.6 Compensation network design
- 5.7 Example of system design
- 5.8 Dimming operation
- 5.9 Component selection
- 5.10 Layout considerations
- 5.11 Thermal considerations
- 5.12 Short-circuit protection
- 5.13 Application circuit
- 6 Application notes - alternative topologies
- 7 Package mechanical data
- 8 Ordering information
- 9 Revision history
Application notes - buck conversion LED5000
26/51 Doc ID 023951 Rev 1
Equation 35
Where V
F
is the free wheeling diode forward voltage and V
SW
the voltage drop across the
internal PDMOS. Considering the range D
MIN
to D
MAX
, it is possible to determine the max
I
RMS
going through the input capacitor. Capacitors that can be considered are:
● Electrolytic capacitors:
These are widely used due to their low price and their availability in a wide range of RMS
current ratings.
The only drawback is that, considering ripple current rating requirements, they are physically
larger than other capacitors.
● Ceramic capacitors:
If available for the required value and voltage rating, these capacitors usually have a higher
RMS current rating for a given physical dimension (due to very low ESR).
The drawback is the considerably high cost.
● Tantalum capacitors:
Small tantalum capacitors with very low ESR are becoming more available. However, they
can occasionally burn if subjected to very high current during charge.
Therefore, it is suggested to avoid this type of capacitor for the input filter of the device as
they could be stressed by an high surge current when connected to the power supply.
In case the selected capacitor is ceramic (so neglecting the ESR contribution), the input
voltage ripple can be calculated as:
Equation 36
5.10 Layout considerations
The layout of switching DC-DC converters is very important to minimize noise and
interference. Power-generating portions of the layout are the main cause of noise and so
high switching current loop areas should be kept as small as possible and lead lengths as
short as possible.
High impedance paths (in particular the feedback connections) are susceptible to
interference, so they should be as far as possible from the high current paths. A layout
example is provided in
Figure 17
.
Table 8. List of ceramic capacitors for the LED5000
Manufacturer Series Capacitor value (µ) Rated voltage (V)
Taiyo Yuden UMK325BJ106MM-T 10 50
Murata GRM42-2 X7R 475K 50 4.7 50
D
MIN
V
OUT
V
F
+
V
INMAX
V
SW
–
--------------------------------------=
V
IN PP
I
O
C
IN
f
SW
⋅
--------------------------
1
D
η
--- -–
⎝⎠
⎛⎞
D⋅
D
η
--- -
1D–()⋅+⋅=