Datasheet

LD49300XX08, LD49300XX10, LD49300XX12 Application hints
Doc ID 12861 Rev 3 13/20
8 Application hints
The LD49300xx is an ultra-high performance, low dropout linear regulator, designed for high
current application that requires fast transient response. The LD49300xx operates from two
input voltages, to reduce dropout voltage. The LD49300xx is designed so that a minimum of
external component are necessary.
8.1 Input supply voltage (V
IN
)
V
IN
provides the power input current to the LD49300xx. The minimum input voltage can be
as low as 1.4 V, allowing conversion from very low voltage supplies to achieve low output
voltage levels with very low power dissipation.
8.2 Bias supply voltage (V
BIAS
)
The LD49300xx control circuitry is supplied the V
BIAS
pin which requires a very low bias
current (3 mA typ.) even at the maximum output current level (3 A). A bypass capacitor on
the bias pin is recommended to improve the performance of the LD49300xx during line and
load transient. The small ceramic capacitor from V
BIAS
to ground reduces high frequency
noise that could be injected into the control circuitry from the bias rail. In typical applications
a 1 µF ceramic chip capacitor may be used. The V
BIAS
input voltage must be 2.1 V above
the output voltage, with a minimum V
BIAS
input voltage of 3 V.
8.3 External capacitors
To assure regulator stability, input and output capacitors are required as shown in the typical
application circuit.
8.4 Output capacitor
The LD49300xx requires a minimum output capacitance to maintain stability. A ceramic chip
capacitor of at least 1 µF is required. However, specific capacitor selection could be needed
to ensure the transient response. A 1 µF ceramic chip capacitor satisfies most applications
but 10 µF is recommended to ensure better transient performances. In applications where
the V
IN
level is close to the maximum operating voltage (V
IN
> 4 V), it is strongly
recommended to use an output capacitors of, at least, 10 µF in order to avoid over-voltage
stress on the Input/output power pins during short circuit conditions due to parasitic
inductive effect. The output capacitor must be located as close as possible to the output pin
of the LD49300xx. The ESR (equivalent series resistance) of the output capacitor must be
within the "STABLE" region as shown in the typical characteristics figures. Both ceramic and
tantalum capacitors are suitable.
8.5 Minimum load current
The LD49300xx does not require a minimum load to maintain output voltage regulation.