Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsVoltage RegulatorsLD49300PT08R

June 2010 Doc ID 12861 Rev 3 1/20

LD49300XX08

LD49300XX10, LD49300XX12

3 A very low drop-out voltage regulator

Features

■ Input voltage range:

–V

= 1.4 V to 5.5 V

–V

BIAS

= 3 V to 6 V

■ Stable with ceramic capacitor

■ ±1.5 % initial tolerance

■ Maximum dropout voltage (V

- V

) of 400 mV

over temperature

■ Adjustable output voltage down to 0.8 V

■ Ultra fast transient response (up to 10 MHz

bandwidth)

■ Excellent line and load regulation

specifications

■ Logic controlled shutdown option

■ Thermal shutdown and current limit protection

■ Junction temperature range: - 25 °C to 125 °C

Applications

■ Graphics processors

■ PC add-in cards

■ Microprocessor core voltage supply

■ Low voltage digital ICs

■ High efficiency linear power supplies

■ SMPS post regulators

Description

The LD49300xx is a high-bandwidth, low drop-

out, 3.0 A voltage regulator, ideal for powering

core voltages of low-power microprocessors. The

LD49300xx implements a dual supply

configuration allowing for very low output

impedance and very fast transient response. The

LD49300xx requires a bias input supply and a

main input supply, allowing for ultra-low input

voltages on the main supply rail. The input supply

operates from 1.4 V to 5.5 V and the bias supply

requires between 3 V and 6 V for proper

operation. The LD49300xx offers fixed output

voltages from 0.8 V to 1.8 V and adjustable output

voltages down to 0.8 V. The LD49300xx requires a

minimum output capacitance for stability, and

works optimally with small ceramic capacitors.

PPAK

Table 1. Device summary

Order codes Package Packaging

LD49300PT08R

(1)

PPAK (Tape and reel) 2500 parts per reel

LD49300PT10R PPAK (Tape and reel) 2500 parts per reel

LD49300PT12R PPAK (Tape and reel) 2500 parts per reel

1. Adjustable version.

www.st.com

Summary of content (20 pages)

PAGE 1
LD49300XX08 LD49300XX10, LD49300XX12 3 A very low drop-out voltage regulator Features ■ Input voltage range: – VI = 1.4 V to 5.5 V – VBIAS = 3 V to 6 V ■ Stable with ceramic capacitor ■ ±1.5 % initial tolerance ■ Maximum dropout voltage (VI - VO) of 400 mV over temperature ■ Adjustable output voltage down to 0.
PAGE 2
Contents LD49300XX08, LD49300XX10, LD49300XX12 Contents 1 Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Alternative application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
LD49300XX08, LD49300XX10, LD49300XX12 1 Typical application circuits Figure 1. Adjustable version Figure 2.
PAGE 4
Alternative application circuits LD49300XX08, LD49300XX10, LD49300XX12 2 Alternative application circuits Figure 3. Single supply voltage solution Figure 4.
PAGE 5
LD49300XX08, LD49300XX10, LD49300XX12 3 Pin configuration Figure 5. Pin connections (top view) Table 2. Pin description Pin n° Symbol Pin configuration Note EN Enable (Input): Logic High = Enable, Logic Low = Shutdown. ADJ Adjustable regulator feedback input. Connect to resistor voltage divider. 2 VIN Input voltage which supplies current to the output power device. 3 GND Ground (TAB is connected to ground). 4 VOUT Regulator output.
PAGE 6
Diagram LD49300XX08, LD49300XX10, LD49300XX12 4 Diagram Figure 6.
PAGE 7
LD49300XX08, LD49300XX10, LD49300XX12 5 Maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Maximum ratings Value Unit VIN Supply voltage -0.3 to 7 V VOUT Output voltage -0.3 to VIN + 0.3 -0.3 to VBIAS + 0.3 V VBIAS BIAS Supply voltage -0.3 to 7 V VEN Enable input voltage -0.
PAGE 8
Electrical characteristics 6 LD49300XX08, LD49300XX10, LD49300XX12 Electrical characteristics (TJ = - 25 °C to 125 °C, VBIAS = VO + 2.1 V (1); VI = VO + 1 V; VEN = VBIAS (2), IO = 10 mA; CI = 1 µF; CO = 10 µF; CBIAS = 1 µF; unless otherwise specified. Typical values are referred to TJ = 25 °C). Table 5. Electrical characteristics Symbol VO Parameter Output voltage accuracy Test conditions Min. TJ = 25 °C, fixed voltage options -1.5 1.5 -3 3 -0.1 0.
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LD49300XX08, LD49300XX10, LD49300XX12 Typical characteristics 7 Typical characteristics Figure 7. Reference voltage vs. temperature Figure 8. Figure 9. Load regulation vs. temperature Figure 10. Line regulation vs. temperature Figure 11. Output voltage vs. input voltage Output voltage vs. temperature Figure 12. Dropout voltage (VIN-VOUT) vs.
PAGE 10
Typical characteristics LD49300XX08, LD49300XX10, LD49300XX12 Figure 13. Dropout voltage (VIN-VOUT) vs. temperature Figure 14. VBIAS pin current vs. temperature Figure 15. Noise vs. frequency Figure 16. Quiescent current vs. temperature Figure 17. Supply voltage rejection vs. output Figure 18. Stability region vs.
PAGE 11
LD49300XX08, LD49300XX10, LD49300XX12 Typical characteristics Figure 19. Stability region vs. COUT & low ESR Figure 20. VBIAS & VIN start up transient response (VIN and VBIAS start up at the same time) VIN=VBIAS=VINH=3.1V, VOUT=1V, COUT=1µF Figure 21. VIN start up transient response (VBIAS start up before VIN) Figure 22. VIN start up transient response (VBIAS start up before VIN) VIN=2.5V, VBIAS=VINH=3.1V, VOUT=1V, COUT=1µF VIN=2.5V, VBIAS=VINH=3.
PAGE 12
Typical characteristics LD49300XX08, LD49300XX10, LD49300XX12 Figure 23. VIN start up transient response (VBIAS start up before VIN and VINH = VIN) Figure 24. Load transient response VIN=VINH=2.5V, VBIAS=3.1V, VOUT=1V, COUT=1µF VIN=2.5V, VBIAS=5V, VOUT=1.
PAGE 13
LD49300XX08, LD49300XX10, LD49300XX12 8 Application hints Application hints The LD49300xx is an ultra-high performance, low dropout linear regulator, designed for high current application that requires fast transient response. The LD49300xx operates from two input voltages, to reduce dropout voltage. The LD49300xx is designed so that a minimum of external component are necessary. 8.1 Input supply voltage (VIN) VIN provides the power input current to the LD49300xx.
PAGE 14
Application hints 8.6 LD49300XX08, LD49300XX10, LD49300XX12 Power sequencing recommendations In order to ensure the correct biasing and settling of the regulator internal circuitry during the startup phase, as well as to avoid overvoltage spikes at the output, it is recommended to provide for the correct power sequencing.
PAGE 15
LD49300XX08, LD49300XX10, LD49300XX12 8.8 Application hints Heatsinking PPAK package The PPAK package uses the copper plane on the PCB as a heatsink. The tab of these packages is soldered to the copper plane for heat sinking. It is also possible to use the PCB ground plane a heatsink.
PAGE 16
Package mechanical data 9 LD49300XX08, LD49300XX10, LD49300XX12 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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LD49300XX08, LD49300XX10, LD49300XX12 Package mechanical data PPAK mechanical data mm. inch. Dim. Min. Typ. Max. Min. Typ. Max. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.4 0.6 0.015 0.023 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 D1 E 5.1 6.4 6.6 E1 4.7 e 1.27 G 4.9 0.244 0.201 0.252 0.260 0.185 0.050 5.25 0.193 0.206 G1 2.38 2.7 0.093 0.106 H 9.35 10.1 0.368 0.
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Package mechanical data LD49300XX08, LD49300XX10, LD49300XX12 Tape & reel DPAK-PPAK mechanical data mm. inch. Dim. Min. Typ. A Min. Typ. 330 13.0 13.2 Max. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 18/20 Max. 0.504 0.512 22.4 0.519 0.882 Ao 6.80 6.90 7.00 0.268 0.272 0.2.76 Bo 10.40 10.50 10.60 0.409 0.413 0.417 Ko 2.55 2.65 2.75 0.100 0.104 0.105 Po 3.9 4.0 4.1 0.153 0.157 0.161 P 7.9 8.0 8.1 0.311 0.315 0.
PAGE 19
LD49300XX08, LD49300XX10, LD49300XX12 10 Revision history Table 6. Document revision history Revision history Date Revision Changes 20-Nov-2006 1 Initial release. 01-Dec-2006 2 Add note in cover page. 30-Jun-2010 3 Modified Section 8.6: Power sequencing recommendations on page 14.
PAGE 20
LD49300XX08, LD49300XX10, LD49300XX12 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.