Datasheet

Pin configuration LD3985
4/22 DocID9587 Rev 15
2 Pin configuration
Figure 2. Pin connections (SOT and TSOT top view, Flip-chip top view)
Flip-chip
SOT23-5L/TSOT23-5L
Table 2. Pin description
Pin n° for
SOT23-5L/
TSOT23-5L
Pin n° for
Flip-chip
Symbol Name and function
14V
I
Input voltage of the LDO
2 2 GND Common ground
31V
INH
Inhibit input voltage: ON mode when V
INH
≥ 1.2 V, OFF mode when V
INH
≤
0.4 V (Do not leave it floating, not internally pulled down/up)
4 5 BYPASS
Bypass pin: an external capacitor (usually 10 nF) has to be connected to
minimize noise voltage
53V
O
Output voltage of the LDO