Datasheet

Pin configuration LD39150
4/26 DocID13159 Rev 4
2 Pin configuration
Figure 2. Pin connections (top view for DPAK and PPAK, bottom view for DFN)
DFN6 (3 x 3 mm)
DPAKPPAK
3
2
1
TAB
CS24160
5
4
3
2
1
CS24140
TAB
11
22
3344
55
66
TAB
CS26660
Table 2. Pin description
Pin n°
SYMBOL NOTE
DFN PPAK DPAK
55
V
SENSE
/N.C.
For fixed versions: to be connected with LDO output voltage pins for DFN
package and not connected on PPAK
ADJ For adjustable version: Error amplifier input pin for V
O
from 1.22 to 5.0 V
321 V
I
LDO input voltage; V
I
from 2.5 V to 6 V, C
I
= 1 μF must be located at a
distance of not more than 0.5’’ from input pin.
443 V
O
LDO output voltage pins, with minimum C
O
= 2.2 μF needed for stability
(also refer to C
O
vs ESR stability chart)
21 V
INH
Inhibit input voltage: ON MODE when V
INH
≥ 2 V, OFF MODE when V
INH
≤
0.3 V (Do not leave floating, not internally pulled down/up)
1 3 2 GND Common ground
6 N.C. Not connected
TAB TAB GND Electrically connected to GND
Exp.
Pad
Connect to GND (it is not a power GND)