Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsVoltage RegulatorsLD39100PUR

October 2011 Doc ID 15676 Rev 3 1/23

LD39100XX

LD39100XX12, LD39100XX25

1 A, low quiescent current, low noise voltage regulator

Features

■ Input voltage from 1.5 to 5.5 V

■ Ultra low dropout voltage (200 mV typ. at 1 A

load)

■ Very low quiescent current (20 µA typ. at no

load, 200 µA typ. at 1 A load, 1 µA max in off

mode)

■ Very low noise with no bypass capacitor

(30 µV

RMS

at V

OUT

= 0.8 V)

■ Output voltage tolerance: ± 2.0 % @ 25 °C

■ 1 A guaranteed output current

■ Wide range of output voltages available on

request: 0.8 V to 4.5 V with 100 mV step and

adjustable from 0.8 V

■ Logic-controlled electronic shutdown

■ Stabilized with ceramic capacitors C

OUT

= 1 µF

■ Internal current and thermal limit

■ DFN6 (3 x 3 mm) package

■ Temperature range: - 40 °C to 125 °C

Applications

■ Printers

■ Personal digital assistants (PDAs)

■ Cordless phones

■ Consumer applications

Description

The LD39100xx provides 1 A maximum current

from an input voltage ranging from 1.5 V to 5.5 V

with a typical dropout voltage of 200 mV. The

device is stable due to the use of ceramic

capacitors on the input and output. The ultra low

drop-voltage, low quiescent current and low noise

features make it suitable for low power battery

powered applications. Power supply rejection is

65 dB at low frequencies and starts to roll off at 10

kHz. An enable logic control function puts the

LD39100xx in shutdown mode, allowing a total

current consumption lower than 1 µA. The device

also includes short-circuit constant current limiting

and thermal protection.

DFN6 (3 x 3 mm)

Table 1. Device summary

Part numbers Order codes Output voltages

LD39100XX LD39100PUR Adj. from 0.8 V

LD39100XX12 LD39100PU12R 1.2 V

LD39100XX25 LD39100PU25R 2.5 V

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Summary of content (23 pages)

PAGE 1
LD39100XX LD39100XX12, LD39100XX25 1 A, low quiescent current, low noise voltage regulator Features ■ Input voltage from 1.5 to 5.5 V ■ Ultra low dropout voltage (200 mV typ. at 1 A load) ■ Very low quiescent current (20 µA typ. at no load, 200 µA typ. at 1 A load, 1 µA max in off mode) ■ Very low noise with no bypass capacitor (30 µVRMS at VOUT = 0.8 V) ■ Output voltage tolerance: ± 2.0 % @ 25 °C ■ 1 A guaranteed output current ■ Wide range of output voltages available on request: 0.8 V to 4.
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Contents LD39100XX, LD39100XX12, LD39100XX25 Contents 1 Circuit schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 3
LD39100XX, LD39100XX12, LD39100XX25 Circuit schematics 1 Circuit schematics Figure 1. Schematic diagram for the LD39100PU IN PG Power-good signal IN BandGap reference Current limit OpAmp OUT Thermal protection ADJ EN Internal enable GND Figure 2.
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Pin configuration LD39100XX, LD39100XX12, LD39100XX25 2 Pin configuration Figure 3. Pin connection (top view) EN VIN EN GND NC GND ADJ PG VOUT VOUT PG LD39100PUxx Table 2.
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LD39100XX, LD39100XX12, LD39100XX25 3 Maximum ratings Table 3. Absolute maximum ratings Symbol Maximum ratings Value Unit -0.3 to 7 V DC output voltage -0.3 to VIN + 0.3 (7 V max) V EN Enable pin -0.3 to VIN + 0.3 (7 V max) V PG Power Good pin -0.
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Electrical characteristics 4 LD39100XX, LD39100XX12, LD39100XX25 Electrical characteristics TJ = 25 °C, VIN = 1.8 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified. Table 6.
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LD39100XX, LD39100XX12, LD39100XX25 Table 6. Electrical characteristics Electrical characteristics for the LD39100PU (continued) Symbol Parameter Test conditions Min. Typ. Enable input logic low VEN IEN tON TSHDN COUT Enable input logic high Enable pin input current Turn-on time VIN=1.5V to 5.5V, -40°C
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Electrical characteristics LD39100XX, LD39100XX12, LD39100XX25 TJ = 25 °C, VIN = VOUT(NOM) + 1 V, CIN = COUT = 1 µF, IOUT = 100 mA, VEN = VIN, unless otherwise specified. Table 7. Symbol VI VOUT Electrical characteristics for LD39100PUxx Parameter VOUT accuracy Static line regulation ΔVOUT Transient line regulation (1) ΔVOUT Static load regulation ΔVOUT Transient load regulation (1) VDROP SVR Max. Unit 1.5 5.5 V VOUT>1.5V, IOUT=10mA, TJ = 25°C -2.0 2.0 VOUT>1.
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LD39100XX, LD39100XX12, LD39100XX25 Table 7. Electrical characteristics Electrical characteristics for LD39100PUxx (continued) Symbol Parameter Test conditions Min. Max. Unit 0.1 100 nA IEN Enable pin input current TON Turn-on time (4) 30 Thermal shutdown 160 Hysteresis 20 TSHDN COUT VEN = VIN Typ. µs °C Output capacitor Capacitance (see typical performance characteristics for stability) 1 22 µF 1. All transient values are guaranteed by design, not production tested 2.
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Typical performance characteristics 5 LD39100XX, LD39100XX12, LD39100XX25 Typical performance characteristics CIN = COUT = 1 µF. Figure 4. VADJ accuracy Figure 5. 2.56 0.86 VIN = 3.5 V, VEN = VIN, IOUT = 10 mA VIN = 1.8 V, VEN = VIN, IOUT = 10 mA 0.84 2.54 0.82 2.52 VOUT [V] VADJ [V] VOUT accuracy 0.8 0.78 2.5 2.48 2.46 0.76 2.44 0.74 -50 -25 0 25 50 75 100 125 -50 150 -25 0 25 50 Figure 6. Dropout voltage vs. temperature (VOUT = 2.5 V) Figure 7.
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LD39100XX, LD39100XX12, LD39100XX25 Typical performance characteristics Figure 10. Output voltage vs. input voltage (VOUT = 0.8 V) Figure 11. Output voltage vs. input voltage (VOUT = 2.5 V) 1.2 3 VIN from 0 to 5.5 V, VEN to VIN, VOUT = 0.8 V, IOUT = 1 A VIN from 0 to 5 V, VEN to VIN, VOUT = 2.5 V, IOUT = 1A 2.5 0.8 VOUT [V] VOUT [V] 1 125°C 0.6 85°C 55°C 0.4 85°C 1.5 0.2 25°C -25°C -25°C -40°C 0 0 0 0 0.5 1 1.5 2 2.5 3 3.5 VIN [V] 4 4.5 5 5.5 0.5 1 1.5 2 2.
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Typical performance characteristics LD39100XX, LD39100XX12, LD39100XX25 Figure 16. Line regulation 0.04 Figure 17. Supply voltage rejection vs. temperature (VOUT = 0.8 V) VIN = from 3.5 V to 5.5 V, IOUT = 100 mA, VEN = VIN, VOUT = 2.5 V 0.03 100 VIN from 1.7 V to 1.9 V, VEN to VIN, VOUT = 0.8 V 80 SVR [dB] Line [%/V] 0.02 0.01 0 -0.01 -0.02 60 40 Freq.10 kHz, IOUT = 100 mA 20 -0.03 Freq.1 kHz, IOUT = 10 mA 0 -50 -0.
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LD39100XX, LD39100XX12, LD39100XX25 Typical performance characteristics VEN [V] Figure 22. Enable voltage vs. temperature 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 VIN = 5.5 V IOUT = 100 mA, VOUT = 0.8 V Figure 23. Load transient (IOUT = from 10 mA to 1 A) High VOUT Low IOUT -25 0 25 50 75 100 125 150 T [°C] VEN= VIN=3.5V, VOUT=0.8V, IOUT= from10mA to 1A, tR= tF =5 µs Figure 24. Load transient (VOUT = 0.8 V) VOUT Figure 25. Load transient (VOUT = 2.5 V) VOUT IOUT IOUT VEN= VIN=3.
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Typical performance characteristics LD39100XX, LD39100XX12, LD39100XX25 Figure 28. Startup transient Figure 29. Enable transient VIN VEN VOUT VOUT VEN= VIN= from 0.8 V, VOUT=0.8 V, IOUT = 100 mA VEN= 0 to 2 V, VOUT=0.8 V, VIN = 3.5 V, IOUT = 100 mA, tR = 5 µs Figure 30. ESR required for stability with ceramic capacitors (VOUT = 0.8 V) Figure 31. ESR required for stability with ceramic capacitors (VOUT = 2.5 V) 0.25 UNSTABLE ZONE 0.2 ESR @ 100kHz [Ω] ESR @ 100 kHz [ohm] 0.25 0.15 0.
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LD39100XX, LD39100XX12, LD39100XX25 6 Application information Application information The LD39100xx is an ultra low dropout linear regulator. It provides up to 1 A with a low 200 mV dropout. The input voltage range is from 1.5 V to 5.5 V. The device is available in fixed and adjustable output versions. The regulator is equipped with internal protection circuitry, such as short-circuit current limiting and thermal protection. The regulator is stable due to ceramic capacitors on the input and the output.
PAGE 16
Application information LD39100XX, LD39100XX12, LD39100XX25 For the adjustable version, the output voltage can be adjusted from 0.8 V up to the input voltage, minus the voltage drop across the PMOS (dropout voltage), by connecting a resistor divider between the ADJ pin and the output, thus allowing remote voltage sensing. The resistor divider should be selected using the following equation: VOUT = VADJ (1 + R1 / R2) with VADJ = 0.8 V (typ.
PAGE 17
LD39100XX, LD39100XX12, LD39100XX25 6.2 Application information Enable function The LD39100xx features an enable function. When the EN voltage is higher than 2 V, the device is ON, and if it is lower than 0.8 V, the device is OFF. In shutdown mode, consumption is lower than 1 µA. The EN pin does not have an internal pull-up, which means that it cannot be left floating if it is not used. 6.3 Power Good function Most applications require a flag showing that the output voltage is in the correct range.
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Package mechanical data 7 LD39100XX, LD39100XX12, LD39100XX25 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
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LD39100XX, LD39100XX12, LD39100XX25 Package mechanical data DFN6 (3x3 mm) mechanical data mm. inch. Dim. Min. Typ. Max. Min. Typ. Max. A 0.80 0.90 1.00 0.031 0.035 0.039 A1 0 0.02 0.05 0 0.001 0.002 A3 0.20 0.008 b 0.23 0.30 0.38 0.009 0.012 0.015 D 2.90 3.00 3.10 0.114 0.118 0.122 D2 2.23 2.38 2.48 0.088 0.094 0.098 E 2.90 3.00 3.10 0.114 0.118 0.122 E2 1.50 1.65 1.75 0.059 0.065 0.069 e L 0.95 0.30 0.40 0.037 0.50 0.012 0.016 0.
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Package mechanical data LD39100XX, LD39100XX12, LD39100XX25 Tape & reel QFNxx/DFNxx (3x3) mechanical data mm. inch. Dim. Min. Typ. A Min. Typ. 330 13.2 12.8 D 20.2 0.795 N 60 2.362 0.504 0.519 18.4 0.724 Ao 3.3 0.130 Bo 3.3 0.130 Ko 1.1 0.043 Po 4 0.157 P 8 0.315 Doc ID 15676 Rev 3 Max. 12.992 C T 20/23 Max.
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LD39100XX, LD39100XX12, LD39100XX25 Package mechanical data Figure 35.
PAGE 22
Revision history LD39100XX, LD39100XX12, LD39100XX25 8 Revision history Table 8. Document revision history Date Revision 29-Jul-2009 1 Initial release. 16-Apr-2010 2 Modified Figure 8 on page 10. 11-Oct-2011 3 Document status promoted from preliminary data to datasheet.
PAGE 23
LD39100XX, LD39100XX12, LD39100XX25 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.