Datasheet

ManualsBrandsSTMICROELECTRONICS ManualsPMICsPMIC - motor controllers Pre-driver - half bridge (2) SPI LQFP 32

This is information on a product in full production.

September 2013 DocID15567 Rev 6 1/53

L99H01

Motor bridge driver for automotive applications

Datasheet

production data

Features

• Operating supply voltage 6 V to 28 V

• Central 2 stage charge pump

• 100% duty cycle

• Full R

DSon

down to 6 V (normal level

MOSFETs)

• Control of reverse battery protection MOSFET

• Charge pump current limited

• PWM operation up to 30 kHz

• SPI interface

• Current sense amplifier / free configurable

• Zero adjust for end of line trimming

• Power management: programmable free

wheeling

• Sensing circuitry of external MOSFETs with

embedded thermal sensors

Applications

• Wiper

• Power door

• Seat belt tensioner

• Seat positioning

• Valve tronic

• Park break

• 2H motors

Description

The L99H01 is designed to control 4 external

N-channel MOS transistors in bridge configuration

for DC-motor driving in automotive applications. A

free configurable current sense amplifier is

integrated. The integrated standard serial

peripheral interface (SPI) controls all outputs and

provides diagnostic information. An interface pin

for the thermal sensors of the external MOSFETs

is implemented.

PowerSSO-36

LQFP32

7x7mm

Table 1. Device summary

Package

Order codes

Part number (tube) Part number (tape and reel) Part number (tray)

PowerSSO-36 L99H01XP L99H01XPTR —

LQFP32 — L99H01QFTR L99H01QF

www.st.com

Summary of content (53 pages)

PAGE 1
L99H01 Motor bridge driver for automotive applications Datasheet - production data Applications • Wiper • Power door • Seat belt tensioner • Seat positioning LQFP32 7x7mm PowerSSO-36 • Valve tronic • Park break • 2H motors Features Description • Operating supply voltage 6 V to 28 V • Central 2 stage charge pump • 100% duty cycle • Full RDSon down to 6 V (normal level MOSFETs) • Control of reverse battery protection MOSFET • Charge pump current limited • PWM operation up to 30 kHz • SPI interface The
PAGE 2
Contents L99H01 Contents 1 2 3 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1 Pinout PowerSSO-36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 Pinout LQFP32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.1 Absolute maximum ratings . . . . . . . . . . . . .
PAGE 3
L99H01 Contents 4.2 4.3 4.4 4.1.3 Serial data output (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.1.4 Chip select not (CSN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 General data description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.2.1 Command byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4.2.2 OpCode definition . . . . . . . . . . . .
PAGE 4
List of tables L99H01 List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. Table 48.
PAGE 5
L99H01 Table 49. Table 50. List of tables LQFP32 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 6
List of figures L99H01 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. 6/53 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Pinning of device in PowerSSO-36 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 7
L99H01 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram 9%$7 Q) &3 9V 15HVHW 9FF 9FFG (1 &3 Q) &3 &3 9FF &HQWUDO 6WHS &KDUJH 3XPS 76 $&7B2)) 8QGHUYROWDJH 2YHUYROWDJH 'HW WU & FRQ DO &RQWURO /RJLF :DNH XS IURP 6OHHSPRGH 9&3 &RQWURO ',5 3:0 026)(7 &RQWURO &61 9V &RQWURO '2 :DWFK 'RJ O UR QW FR )) DO B2 LR Q & 7 W RS $ 76 6+ 6+ *DWH 'ULYHU /6 'LDJQRVLV ', & *+ 9&3 &/.
PAGE 8
Block diagram and pin description L99H01 Table 2. Pin definitions and functions (continued) Pin Symbol 9 CLK Serial clock input: this input controls the internal shift register of the SPI and requires CMOS logic levels.This input has a pull-down current. 10 DI Serial data in: the input requires CMOS logic levels and receives serial data from the microcontroller. The data is an 8-bit control word and the most significant bit (MSB, bit 7) is transferred first. This input has a pull-down current.
PAGE 9
L99H01 Block diagram and pin description Figure 2. Pinning of device in PowerSSO-36 package *1' *1'' 9&&' 9&& (1 ',5 3:0 &61 &/. ', '2 1& &62 1& &6, &6, &6, &6, 3RZHU662 96 &3 &3 &3 &3 &3 *+ 6+ */ 6/ 6+ *+ 6/ */ 1& 76 $&7B2)) 1& 1& ("1($'5 1. The slug is connected to pin 1. 1.2 Pinout LQFP32 Table 3.
PAGE 10
Block diagram and pin description L99H01 Table 3. Pin definitions and functions (continued) Pin Symbol 10 DIR 11 PWM PWM input for H-bridge control. This input has a pull-down current. 12 CSN Chip select not input: this input is low active and requires CMOS logic levels. The serial data transfer between L99H01 and microcontroller is enabled by pulling the input CSN to low-level. This input has a pull-up current.
PAGE 11
L99H01 Block diagram and pin description *+ 6+ 6/ */ 6+ *+ &3 &3 Figure 3. Pinning of device in LQFP-32 package -2'1 6/ */ 76 $&7B2)) 1& &6, &6, &6, &6, &62 '2 ', &/.
PAGE 12
Electrical specifications L99H01 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4.
PAGE 13
L99H01 2.3 Electrical specifications Thermal data Table 6. Operating junction temperature Item Symbol 6.1 Tj Parameter Operating junction temperature Value Unit -40 to 150 °C Table 7. Temperature warning and thermal shutdown Item Symbol Parameter Min. Typ. 7.1 TjTW ON Temperature warning threshold junction temperature 7.2 TjSD ON 7.3 TjSD OFF Max.
PAGE 14
Electrical specifications L99H01 Table 9. Supply (continued) Item Symbol 9.6 VVS_UV 9.7 VVS_UVH Parameter Min. Typ. Max. Unit Undervoltage disable low threshold 4.7 4.9 5.1 V Undervoltage threshold hysteresis 0.2 0.3 0.4 V VS = 13 V; VCC = 5 V; Active mode; Outputs floating 4.5 5.5 6.5 mA VS = 6 V to 28 V; VCC = 5.0 V; Active mode; Outputs floating 2.5 18 mA 5 µA 9.8.1 IS VS DC supply current 9.8.
PAGE 15
L99H01 Electrical specifications Table 12. Inputs: CSN, CLK, PWM, DIR, EN and DI Item Symbol 12.1 Vin L Low-level input voltage 12.2 Vin H High-level input voltage 12.3 Vin Hyst Input voltage hysteresis 12.4 ICSN in Pull-up current at input CSN VCSN = VCC - 1.5 V -50 -25 -10 µA 12.5 ICLK in Pull-down current at input CLK VCLK = 1.5 V 10 35 50 µA 12.6 IDI in Pull-down current at input DI VDI = 1.5 V 10 35 50 µA 12.7 IDIR in Pull-down current at input DIR VDIR = 1.
PAGE 16
Electrical specifications L99H01 Table 14. Gate drivers for external PowerMOS Item Symbol Parameter Test condition Min. Typ. Max. Unit 0.3 0.5(2) 0.8 A VSHx = 0 V; IGHx = 50 mA; Tj = 25°C 3 4 5 W VSHx = 0 V; IGHx = 50 mA; Tj = 125°C 4.5 5.3 7 W Drivers for external high-side PowerMOS 14.1 IGHx(on) Turn on current (SOURCE stage) 14.2.1 RGHx On-resistance of SINK stage 14.2.2 14.3 VGHxH Gate on voltage 14.
PAGE 17
L99H01 Electrical specifications Table 15. Cross current protection time(1) Item Symbol Parameter Test condition Min. Typ. Max. 15.1 tCCP0 Cross current protection time — — 250(2) — 15.2 tCCP1 Cross current protection time — 250 500 750 15.3 tCCP2 Cross current protection time — 500 750 1000 15.4 tCCP3 Cross current protection time — 700 1000 1300 15.5 tCCP4 Cross current protection time — 950 1250 1570 15.
PAGE 18
Electrical specifications L99H01 Table 18. Current sense amplifier(1) (continued) Item Symbol Parameter Test condition 18.6 VIOFF-T20/ΔT Input offset voltage drift vs. temperature Gain = 20 -18(2) µV/°K 18.7 VIOFF-T10/ΔT Input offset voltage drift vs. temperature Gain = 10 -27(2) µV/°K 18.8 VIOFF-O_50 Input offset voltage with offset Gain = 50 compensation -3.5 -1 1.5 mV 18.9 VIOFF-O_20 Input offset voltage with offset Gain = 20 compensation -6 -2 4 mV 18.
PAGE 19
L99H01 Electrical specifications Figure 4. Output timing diagram (active free wheeling) 3:0 W*/[+/ *+ /[ W W*+[+/ W*+[U W&&3 */ +[ W W*+[I W&&3 W*/[I W*/[U W *+[ IRU ): ORZ IUHH ZKHHOLQJ */[ IRU ): KLJK */[ IRU ): ORZ *+[ IRU ): KLJK ("1($'5 Figure 5.
PAGE 20
Electrical specifications 2.5 L99H01 SPI - electrical characteristics VS = 6 V to 28 V, VCC = 3 V to 5.3 V, Tj = -40°C to 150°C, unless otherwise specified. The voltages are referred to GND and currents are assumed positive, when the current flows into the pin. Table 19. DI timing(1) Item Symbol 19.1 tCLK 19.2 Parameter Test condition Min. Typ. Max. Unit Clock period — 1000 — ns tCLKH Clock high time — 400 — ns 19.3 tCLKL Clock low time — 400 — ns 19.
PAGE 21
L99H01 Electrical specifications Table 21. DO timing Item Symbol Parameter 21.1 tr DO DO rise time 21.2 tf DO 21.3 Min. Typ. Max. Unit CL = 100 pF; Iload = -1 mA — 80 140 ns DO fall time CL = 100 pF; Iload = 1 mA — 50 100 ns ten DO tri L DO enable time from tristate to low-level CL = 100 pF; Iload = 1 mA; pull-up load to VCC — 100 250 ns 21.4 tdis DO L tri DO disable time from CL = 100 pF; Iload = 4 mA; low-level to tristate pull-up load to VCC — 380 450 ns 21.
PAGE 22
Electrical specifications L99H01 Figure 6. SPI - transfer timing diagram &61 KLJK WR ORZ '2 HQDEOHG &61 WLPH &/. ', ', GDWD ZLOO EH DFFHSWHG RQ WKH ULVLQJ HGJH RI &/. VLJQDO DFWXDO GDWD WLPH QHZ GDWD WLPH '2 GDWD ZLOO FKDQJH RQ WKH IDOOLQJ HGJH RI &/.
PAGE 23
L99H01 Electrical specifications Figure 8. SPI - DO valid data delay time and valid time W I LQ W U LQ 9&& 9&& 9&& &/. W U '2 '2 ORZ WR KLJK 9&& 9&& W G '2 W I '2 9&& '2 KLJK WR ORZ 9&& ("1($'5 Figure 9.
PAGE 24
Electrical specifications L99H01 Figure 10. SPI - timing of status bit 0 (fault condition) &61 KLJK WR ORZ DQG &/. VWD\V ORZ VWDWXV LQIRUPDWLRQ RI GDWD ELW IDXOW FRQGLWLRQ LV WUDQVIHUHG WR '2 &61 WLPH &/.
PAGE 25
L99H01 Device description 3 Device description 3.1 Dual power supply: VS and VCC The power supply voltage VS supplies the charge-pump. An internal charge-pump is used to drive the high-side switches and the low-side switches. The logic supply voltage VCC (3.3 V / 5 V) is used for the logic part and the SPI of the device. Due to the independent logic supply voltage the control and status information is not lost, even if the supply voltage VS is switched-off.
PAGE 26
Control pins Control bits Failure bits Output pins SPI DO N° Comment EN DIR PWM TS/ACT_OFF FW FW_PAS CP_LOW OV UV SC TSD WDTO GH1 GL1 GH2 GL2 GL_ER DocID15567 Rev 6 1 0 X X X X X X X X X X X RL RL RL RL T Standby mode 2 1 X X X X X X X X X X X RL RL RL RL 1 Power-on reset 3 1 X X 0 X 0 0 0 0 0 0 0 L L L L 0 EXT_TS = 1 (external thermal shutdown) 4 1 X X 0 X 0 0 0 0 0 0 0 L L L L 0 EXT_TS = 0 (active Off) 5 1 X X 1 X X
PAGE 27
L99H01 Device description Symbols: 3.4 • x: Don't care • 1: Logic high or active • 0: Logic low or not active • H: Output in source condition • L: Output in sink condition • RL: Resistive low (see Section 3.
PAGE 28
Device description L99H01 VVS_UV, all gate driver stages are switched in the sink condition to avoid driving the power devices without sufficient gate driving voltage (increased power dissipation), setting the UV bit. In both cases, overvoltage and undervoltage detection, the charge pump is disabled. If the supply voltage VS recovers from UV/OV to normal operating voltage range and if the OV_UV_RD is set to 0, then the charge pump is automatically enabled.
PAGE 29
L99H01 3.11 Device description Current sense amplifier (CSA) The current sense amplifier (CSA) is specially designed for current shunt automotive applications. It is a bidirectional, single-supply difference amplifier for amplifying small differential voltages in a wide common mode voltage range (-4 V to (VCP - 8) V). It supports the current measurement at two shunts. The result of respective shunt can be multiplexed to the microcontroller compatible output voltage by a SPI command.
PAGE 30
Device description L99H01 condition and the watchdog time out bit (WDTO) is set. Once the watchdog times out, the gate drivers can only be reactivated by sending a software reset.
PAGE 31
L99H01 Functional description of the SPI 4 Functional description of the SPI 4.1 Signal description 4.1.1 Serial clock (CLK) This input signal provides the timing of the serial interface. Data present at serial data input (DI) is latched on the rising edge of serial clock (CLK). Data on Serial Data Out (DO) is shifted out at the falling edge of serial clock (CLK). The serial clock CLK must be active only during a frame (CSN low phase).
PAGE 32
Functional description of the SPI L99H01 Table 24. DI Command byte DI - data byte 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OC1 OC0 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Table 25. DO Global Status byte 4.2.1 15 14 13 12 GL_ER FE STK_RESET_Q DO - data byte 11 10 9 8 7 6 5 4 3 2 1 0 TSD TW UV OV WDTO D7 D6 D5 D4 D3 D2 D1 D0 Command byte Each communication frame starts with a command byte.
PAGE 33
L99H01 Functional description of the SPI More detailed descriptions of the device information are available in Section 4.7 .
PAGE 34
Device memory map 4.3.1 Control and status (RAM) address map Table 28.
PAGE 35
L99H01 4.4 Functional description of the SPI Global status byte This byte is shifted out first at DO at every SPI access. The GL_ER bit is present at DO with the falling edge of CSN. This byte could be reseted with the command . Table 30. STK_RESET_Q Bit 15 14 13 12 11 10 9 8 Name GL_ER FE STK_RESET_Q TSD TW UV OV WDTO 0 0 1 0 0 0 0 0 Comments: • GL_ER: Global error flag.
PAGE 36
Functional description of the SPI 4.4.1 L99H01 SPI clock monitor and watchdog Figure 11. Global error flag diagram 6', 6&. &61 5:' $SSO5HJ[ ELW :' FRXQWHU &ORFN 0RQLWRU :DWFKGRJ )DLOXUH &RPPXQLFDWLRQ (UURU *OREDO 6WDWXV %\WH *OREDO (UURU )ODJ 6'2 (UU ("1($'5 1. Writing a “1” to RWD - bit in ApplRegx restarts the internal watchdog counter. The clock monitor counts the number of clock pulses during a communication frame (while CSN is low).
PAGE 37
L99H01 4.5 Functional description of the SPI Detailed byte description of status register (StatReg0) The read operation starts always with the command byte followed by 1 data byte. The content of the send data byte has to be ‘0’. The content of the addressed register is shifted out at DO within the same frame (‘in-frame response’). The device uses 1 status register to monitor the state of the device. Table 31 shows the address and the content of the register. Table 31.
PAGE 38
Functional description of the SPI 4.6 L99H01 Detailed byte description of application registers (ApplRegX) The write/read operation starts always with a command byte followed by 1 data byte. 4.6.1 Description of the data byte The device uses 3 application registers to configure the device. Note that the last row shows the logic levels during a reset phase. Table 33.
PAGE 39
L99H01 Functional description of the SPI Table 36. Address 2 <02(hex)>: ApplReg2 – read/write Bit 7 6 5 4 3 2 1 0 Name RWD COPT_2 COPT_1 COPT_0 FW MCSA GCSA_1 GCSA_0 0 0 0 0 0 0 0 0 Comments: • RWD: Restarts the watchdog counter • COPT[2:0]: Filter time to protect the two external halfbridges against cross current. Table 37.
PAGE 40
Functional description of the SPI L99H01 Table 40. Address 3 <03(hex)> : ApplReg3 – read/write Bit 7 Name 6 5 4 3 2 1 0 RWD EXT_TS EXTTH_5 EXTTH_4 EXTTH_3 EXTTH_2 EXTTH_1 EXTTH_0 0 0 0 0 0 0 0 0 Comments: • RWD: Restarts the watchdog counter • EXT_TS: The bit select the mode of the input pin TS/ACT_OFF: • – EXT_TS = low (active off): TS/ACT_OFF pin is used as input to switch the H-bridge in tristate and back. Details are discribed in Section 3.12.1.
PAGE 41
L99H01 Functional description of the SPI Equation 1 Vth = n * (0.31 + m * 0.03) V The purpose of factor n is to determine the number of external temperature sense diodes (in series). With factor m the level of the threshold voltage can be fine tuned. 4.7 Read device information (ROM) The device information is stored at the ROM addresses defined below and is read using the respective operating code. Table 43.
PAGE 42
Functional description of the SPI L99H01 Table 46. Address 2 <02(hex)>: product ID (MSB) - read only(1) Bit Name 7 6 5 4 3 2 1 0 PR_ID_15 PR_ID_14 PR_ID_13 PR_ID_12 PR_ID_11 PR_ID_10 PR_ID_9 PR_ID_8 0 0 1 0 1 X X X 1. Addressable only through a read device Information command. The (ROM address 03H) provides information about the register width (1, 2, 3 bytes) and the availability of ‘burst mode read’ option. Table 47.
PAGE 43
L99H01 5 Packages thermal data Packages thermal data Figure 12. PowerSSO-36 Rthj-amb vs. PCB copper area in open free air condition RTHj_amb(°C/W) 65 60 55 50 45 40 35 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) 1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area = 129 mm x 60 mm, PCB thickness =1.6 mm, Cu thickness =70 µm (front and back side), Copper areas: from minimum pad layout to 8 cm2).
PAGE 44
Package and packing information L99H01 6 Package and packing information 6.1 ECOPACK® In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
PAGE 45
L99H01 6.2 Package and packing information PowerSSO-36 package information Figure 13.
PAGE 46
Package and packing information L99H01 Table 48. PowerSSO-36 mechanical data Millimeters Symbol Min. Typ. Max. A 2.15 - 2.45 A2 2.15 - 2.35 a1 0 - 0.1 b 0.18 - 0.36 c 0.23 - 0.32 D(1) 10.10 - 10.50 E(1) 7.4 - 7.6 e - 0.5 - e3 - 8.5 - F - 2.3 - G - - 0.1 H 10.1 - 10.5 h - - 0.4 k 0° - 8° L 0.55 - 0.85 M - 4.3 - N - - 10° O - 1.2 - Q - 0.8 - S - 2.9 - T - 3.65 - U - 1 - X 4.1 - 4.7 Y 6.5 - 7.1 1.
PAGE 47
L99H01 6.3 Package and packing information Packages thermal data Figure 14. LQFP32 Rthj-amb vs. PCB copper area in open box free air condition RTHj_amb(°C/W) 81 80 79 78 77 76 75 0 0.2 0.4 0.6 0.8 1 PCB Cu heatsink area (cm^2) 1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area = 78 mm x 86 mm, PCB thickness =1.6 mm, Cu thickness =70 µm (front and back side), copper areas: from minimum pad layout to 8 cm2).
PAGE 48
Package and packing information 6.4 L99H01 LQFP32 package information Figure 15.
PAGE 49
L99H01 Package and packing information Table 49. LQFP32 mechanical data Millimeter Dim. Min. Typ. A Max. 1.60 A1 0.05 A2(1) 1.35 1.40 1.45 b 0.30 0.37 0.45 c 0.09 D 8.80 9.00 9.20 D1 6.80 7.00 7.20 D3 0.15 0.20 5.60 E 8.80 9.00 9.20 E1 6.80 7.00 7.20 E3 5.60 e 0.80 L 0.45 L1 Κ 0.60 0.75 1.00 0° ccc 3.5° 7° 0.10 1. LQFP stands for low profile quad flat pachage. Low profile: Body thickness (A2 = 1.
PAGE 50
Package and packing information 6.5 L99H01 PowerSSO-36 packing information Figure 16. PowerSSO-36 tube shipment (no suffix) All dimensions are in mm. Base qty Bulk qty Tube length (±0.5) A B C (±0.1) C B 49 1225 532 3.5 13.8 0.6 A Figure 17. PowerSSO-36 tape and reel shipment (suffix “TR”) Reel dimensions Base qty Bulk qty A (max) B (min) C (±0.2) F G (+2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.
PAGE 51
L99H01 6.6 Package and packing information LQFP32 packing information Figure 18. LQFP32 tape and reel shipment (suffix “TR”) Figure 19.
PAGE 52
Revision history 7 L99H01 Revision history Table 50. Document revision history 52/53 Date Revision Changes 17-Apr-2009 1 Initial release. 19-Aug-2009 2 Updated corporate template from V3 to V3.1 Updated Figure 4. Removed items 17.16, 17.18 and 17.20 of the Table 18: Current sense amplifier. Added Table 15: Cross current protection time Table 18: Current sense amplifier.
PAGE 53
L99H01 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.