Datasheet

L9942 Logic with SPI - electrical characteristics
Doc ID 11778 Rev 7 31/40
Figure 12. SPI - DO valid data delay time and valid time
Figure 13. DO enable and disable time
0.8 VCC
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
0.2 VCC
CLK
DO
(low to hi
g
h)
DO
(hi
g
hto low)
0.5 VCC
t
rin
t
rDO
t
f DO
t
dDO
t
f in
CSN
t
f in r in
t
DO
DO
e n D O tri L
t t
dis D O L tri
50%
0.8 VC C
0.2 VC C
50%
50%
e n D O tri H
t t
dis D O H tri
C = 100 pF L
C = 100 pF L
pull-up load to V C C
pull-dow n load to G N D