Datasheet

L9942 Logic with SPI - electrical characteristics
Doc ID 11778 Rev 7 29/40
6.3 Outputs: DO, PWM
6.4 Output: DO timing
6.5 CSN timing
Table 23. Outputs: DO, PWM
Symbol Parameter Test condition Min. Typ. Max. Unit
V
DOoutL
Output low level VCC = 5 V, I
D
= 2 mA - 0.2 0.4 V
V
PWMoutL
V
DOoutH
output high level VCC = 5 V, I
D
= -2 mA
VCC -
0.4
VCC -
0.2
-V
V
PWMoutH
I
DOoutLK
Tristate leakage current
V
CSN
= VCC,
0 V <
V
DO
< VCC
-10 - 10 µA
I
PWMoutLK
Tristate leakage current
Register3bit5=1 (NPWM)
0 V < V
PWM
< VCC
-10 - 10 µA
C
out
(1)
Tristate input capacitance
V
CSN
= VCC,
0 V < VCC < 5.3 V
- 10 15 pF
Table 24. Output: DO timing (see Figure 12 and Figure 13)
Symbol Parameter Test condition Min. Typ. Max. Unit
t
r DO
DO rise time C
L
= 100 pF, I
load
= -1 mA - 50 100 ns
t
f DO
DO fall time C
L
= 100 pF, I
load
= 1 mA - 50 100 ns
t
en DO tri L
DO enable time from tristate to low
level
C
L
= 100 pF, I
load
= 1 mA pull-
up load to VCC
- 50 250 ns
t
dis DO L tri
DO disable time from low level to
tristate
C
L
= 100 pF, I
load
= 4 mA pull-
up load to VCC
- 50 250 ns
t
en DO tri H
DO enable time from tristate to
high level
C
L
= 100 pF, I
load
= -1 mA pull-
down load to GND
- 50 250 ns
t
dis DO H tri
DO disable time from high level to
tristate
C
L
= 100 pF, I
load
= -4 mA
pull-down load to GND
- 50 250 ns
t
d DO
DO delay time
V
DO
< 0.3 VCC, V
DO
> 0.7
VCC, C
L
= 100 pF
- 50 250 ns
Table 25. CSN timing
Symbol Parameter Test condition Min. Typ. Max. Unit
t
CSN_HI,min
(1)
CSN high time, active mode
Transfer of SPI-command to
Input Register
2 - - µs
1. Parameter guaranteed by design.