Datasheet

Electrical specifications L9942
20/40 Doc ID 11778 Rev 7
3.4.6 PWM control
Figure 8. Switching on minimum time
Table 13. PWM control (see Figure 4 and Figure 7)
Symbol Parameter Test condition Min. Typ. Max. Unit
f
PWM
(1)
Frequency of PWM cycles
Bit: FRE= 1 - 20.8 - kHz
Bit: FRE= 0 - 31.3 - kHz
T
MD
(1)
Mixed decay switch off delay time
Bits: DM1 DM0= 0 1 - 4 - µs
Bits: DM1 DM0= 1 0 - 8 - µs
T
FT
(1)
Glitch filter delay time
Bit: FILTER= 0 - 1.5 - µs
Bit: FILTER= 1 - 2.5 - µs
T
cc
(1)
T
B
(1)
Cross current protection time Blank
time of comparator
Bits: SR1 SR0= 0 0 - 0.5 - µs
Bits: SR1 SR0= 0 1 - 1 - µs
Bits: SR1 SR0= 1 0 - 2 - µs
Bits: SR1 SR0= 1 1 - 4 - µs
VSR
Slew rate (dV/dt 30 % - 70 %) @HS
switches on resistive load of 10 ,
VS = 13.5 V
Bits: SR1 SR0= 0 0 - 13 - V/µs
Bits: SR1 SR0= 0 1 - 13 - V/µs
Bits: SR1 SR0= 1 0 - 6 - V/µs
Bits: SR1 SR0= 1 1 - 6 - V/µs
1. This parameter is guaranteed by design.
Time base is an internal trimmed oscillator of typical 2MHz and it has an accuracy of ±6 %.
Internal PWM
clock
20 or 30 kHz
decay
on
Load current
at Qxn
Step limit
T
B
Blank time of current comparator
T
CC
T
FT
Time
Cross current protection time
CC
T
T
CC
T
PWM
T
B
T
FT
Filter time of current comparator
Pin PWM
(for bridge A)
T
INT _2MHz
e.g. T
B
= T
CC
T
FT
= 1.5 us= 1 us