L7985 2 A step-down switching regulator Datasheet − production data Features ■ 2 A DC output current ■ 4.5 V to 38 V input voltage ■ Output voltage adjustable from 0.
Contents L7985 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Thermal data . . . . . . . .
L7985 Contents 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 9 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin settings L7985 1 Pin settings 1.1 Pin connection Figure 2. Pin connection (top view) OUT VCC OUT VCC SYNCH EN COMP GND FSW FB OUT VCC SYNCH EN COMP GND FSW FB HSOP8 VFQFPN10 1.2 Pin description Table 1. N. N. (VFQFPN) (HSOP) 1-2 1 Type OUT 3 2 SYNCH 4 3 EN 5 4 COMP 6 4/43 Pin description 5 Description Regulator output Master/slave synchronization.
L7985 2 Maximum ratings Maximum ratings Table 2. Absolute maximum ratings Symbol 3 Parameter Vcc Input voltage OUT Output DC voltage Value Unit 45 -0.3 to VCC FSW, COMP, SYNCH Analog pin -0.3 to 4 EN Enable pin -0.3 to VCC FB Feedback voltage -0.3 to 1.5 PTOT Power dissipation at TA < 60 °C VFQFPN HSOP 1.5. V W 2 TJ Junction temperature range -40 to 150 °C Tstg Storage temperature range -55 to 150 °C Thermal data Table 3.
Electrical characteristics 4 L7985 Electrical characteristics TJ = 25 °C, VCC = 12 V, unless otherwise specified. Table 4. Electrical characteristics Values Symbol Parameter Test conditions Unit Min. VCC Operating input voltage range (1) VCCON Turn on VCC threshold (1) VCCHYS VCC UVLO hysteseris (1) RDSON MOSFET on resistance Typ. 4.5 Max. 38 4.5 0.1 V 0.4 200 ILIM mΩ (1) 400 Maximum limiting current 2.5 3.0 3.
L7985 Electrical characteristics Table 4. Electrical characteristics (continued) Values Symbol Parameter Test conditions Unit Min. Typ. Max. Error amplifier VCH High level output voltage VFB<0.6 V VCL Low level output voltage VFB>0.6 V Source COMP pin VFB=0.5 V, VCOMP=1 V 19 mA Sink COMP pin VFB=0.7 V, VCOMP=1 V 30 mA Open-loop voltage gain (2) 100 dB IO SOURCE IO SINK GV 3 V 0.1 Synchronization function VS_IN,HI High input voltage VS_IN,LO Low input voltage tS_IN_PW 2 3.
Functional description 5 L7985 Functional description The L7985 is based on a “voltage mode” constant frequency control. The output voltage VOUT is sensed by the feedback pin (FB) compared to an internal reference (0.6 V) providing an error signal that, compared to a fixed frequency sawtooth, controls the on- and off-time of the power switch. The main internal blocks are shown in the block diagram in Figure 3.
L7985 5.1 Functional description Oscillator and synchronization Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides a constant frequency clock. Its frequency depends on the resistor externally connect to the FSW pin. If the FSW pin is left floating, the frequency is 250 kHz; it can be increased as shown in Figure 6 by an external resistor connected to ground.
Functional description 10/43 L7985 Figure 5. Sawtooth: voltage and frequency feed-forward; external synchronization Figure 6. Oscillator frequency vs.
L7985 5.2 Functional description Soft-start The soft-start is essential to assure correct and safe startup of the step-down converter. It avoids inrush current surge and makes the output voltage increase monothonically. The soft-start is performed by a staircase ramp on the non-inverting input (VREF) of the error amplifier.
Functional description 5.3 L7985 Error amplifier and compensation The error amplifier (E/A) provides the error signal to be compared with the sawtooth to perform the pulse width modulation. Its non-inverting input is internally connected to a 0.6 V voltage reference, while its inverting input (FB) and output (COMP) are externally available for feedback and frequency compensation.
L7985 5.4 Functional description Overcurrent protection The L7985 implements overcurrent protection by sensing current flowing through the power MOSFET. Due to the noise created by the switching activity of the power MOSFET, the current sensing is disabled during the initial phase of the conduction time. This avoids an erroneous detection of a fault condition. This interval is generally known as “masking time” or “blanking time”. The masking time is about 200 ns.
Functional description L7985 Equation 5 VIN ⋅ F *SW – V F ⁄ T ON_MIN I OUT = -------------------------------------------------------------------------------------------------------------------------- = 3.68A ( DRC ⁄ T ON_MIN ) + ( R DSON + DCR ) ⋅ F *SW where FSW* is 700 kHz divided by eight. Figure 8. 5.5 Overcurrent protection Enable function The enable feature allows to put the device into standby mode. With the EN pin lower than 0.
L7985 Application information 6 Application information 6.1 Input capacitor selection The capacitor connected to the input must be capable of supporting the maximum input operating voltage and the maximum RMS input current required by the device. The input capacitor is subject to a pulsed current, the RMS value of which is dissipated over its ESR, affecting the overall system efficiency.
Application information L7985 Equation 10 IO C IN = ------------------------------- ⋅ V PP ⋅ F SW D ⎛1 – D ----⎞⎠ ⋅ D + ---- ⋅ ( 1 – D ) ⎝ η η neglecting the small ESR of the ceramic capacitors. Considering η=1, this function has its maximum in D=0.
L7985 Application information Equation 13 V OUT + V F 1 – D MIN L MIN = ----------------------------- ⋅ -----------------------ΔI MAX F SW where FSW is the switching frequency, 1/(TON + TOFF). For example, for VOUT=5 V, VIN=24 V, IO=2 A and FSW=250 kHz, the minimum inductance value to have ΔIL=30% of IO is about 28 μH.
Application information L7985 Usually the resistive component of the ripple is much higher than the capacitive one, if the output capacitor adopted is not a multi-layer ceramic capacitor (MLCC) with very low ESR value. The output capacitor is important also for loop stability: it fixes the double LC filter pole and the zero due to its ESR. Section 6.4 illustrates how to consider its effect in the system stability. For example, with VOUT=5 V, VIN=24 V, ΔIL=0.
L7985 Application information Equation 17 V S = K ⋅ VIN In this way the PWM modulator gain results constant and equal to: Equation 18 V IN 1 = ---- = 18 G PW0 = --------K Vs The synchronization of the device with an external clock provided through the SYNCH pin can modify the PWM modulator gain (see Section 5.1 to understand how this gain changes and how to keep it constant in spite of the external synchronization). Figure 9.
Application information L7985 Equation 21 R OUT ⋅ L ⋅ C OUT ⋅ ( R OUT + ESR ) Q = ------------------------------------------------------------------------------------------------------- , L + C OUT ⋅ R OUT ⋅ E SR V OUT R OUT = --------------I OUT As seen in Section 5.3, two different kinds of network can compensate the loop. In the following two paragraphs the guidelines to select the type II and type III compensation network are illustrated. 6.4.
L7985 Application information Figure 10. Type III compensation network In Figure 11 the Bode diagram of the PWM and LC filter transfer function (GPW0 · GLC(f)) and the open-loop gain (GLOOP(f)=GPW0 · GLC(f) · GTYPEIII(f)) are shown. Figure 11. Open-loop gain: module Bode diagram The guidelines for positioning the poles and the zeroes and for calculating the component values can be summarized as follows: 1. Choose a value for R1, usually between 1 kΩ and 5 kΩ. 2.
Application information L7985 Equation 25 1 C 4 = ---------------------------------π ⋅ R 4 ⋅ f LC 4. Calculate C5 by placing the second pole at four times the system bandwidth (BW): Equation 26 C4 C 5 = ------------------------------------------------------------------------2π ⋅ R 4 ⋅ C 4 ⋅ 4 ⋅ BW – 1 5.
L7985 Application information Figure 12.
Application information 6.4.2 L7985 Type II compensation network If the equivalent series resistance (ESR) of the output capacitor introduces a zero with a frequency lower than the desired bandwidth (that is: 2π∗ESR∗COUT>1/BW), this zero helps stabilize the loop. Electrolytic capacitors show non-negligible ESR (>30 mΩ), so with this kind of output capacitor the type II network combined with the zero of the ESR allows the stabilization of the loop. In Figure 13 the type II network is shown. Figure 13.
L7985 Application information Figure 14. Open-loop gain: module Bode diagram The guidelines for positioning the poles and the zeroes and for calculating the component values can be summarized as follows: 1. Choose a value for R1, usually between 1k and 5k, in order to have values of C4 and C5 not comparable with parasitic capacitance of the board. 2.
Application information L7985 Equation 31 C4 C 5 = ------------------------------------------------------------------------2π ⋅ R 4 ⋅ C 4 ⋅ 4 ⋅ BW – 1 For example with VOUT=5 V, VIN=24 V, IO=2 A, L=22 μH, COUT=330 μF, ESR=70 mΩ, the type II compensation network is: R 1 = 1.1kΩ, R 2 = 150Ω, R 4 = 4.99kΩ, C 4 = 180nF, C 5 = 180pF In Figure 15 the module and phase of the open-loop gain is shown. The bandwidth is about 36 kHz and the phase margin is 53 °. Figure 15.
L7985 6.5 Application information Thermal considerations The thermal design is important to prevent the thermal shutdown of the device if junction temperature goes above 150 °C. The three different sources of losses within the device are: a) conduction losses due to the non-negligible RDSON of the power switch; these are equal to: Equation 32 2 PON = R DSON ⋅ ( I OUT ) ⋅ D where D is the duty cycle of the application and the maximum RDSON overtemperature is 220 mΩ.
Application information L7985 Figure 16. Switching losses 6.6 Layout considerations The PC board layout of the switching DC/DC regulator is very important to minimize the noise injected in high impedance nodes and interference generated by the high switching current loops. In a step-down converter, the input loop (including the input capacitor, the power MOSFET and the freewheeling diode) is the most critical one. This is due to the fact that the high value pulsed currents are flowing through it.
L7985 Application information Figure 17.
Application information 6.7 L7985 Application circuit In Figure 18 the demonstration board application circuit is shown. Figure 18. Demonstration board application circuit Table 9. Component list Reference 30/43 Part number Description Manufacturer C1 UMK325BJ106MM-T 10 μF, 50 V Taiyo Yuden C2 GRM32ER61E226KE15 22 μF, 25 V Murata C3 3.3 nF, 50 V C4 33 nF, 50 V C5 100 pF, 50 V C6 470 nF, 50 V R1 4.99 kΩ, 1%, 0.1 W 0603 R2 1.1 kΩ, 1%, 0.1 W 0603 R3 330 Ω, 1%, 0.1 W 0603 R4 1.
L7985 Application information Figure 19. PCB layout: L7985 and L7985A (component side) Figure 20. PCB layout: L7985 and L7985A (bottom side) Figure 21.
Application information L7985 Figure 22. Junction temperature vs. output current VIN = 24 V VQFN Figure 23. Junction temperature vs. output current VIN = 12 V VQFN HSOP VOUT=5V VOUT=5V VOUT=3.3V VOUT=3.3V VOUT=1.8V VOUT=1.8V HSOP VIN=24V FSW=250KHz TAMB=25 C VIN=24V FSW=250KHz TAMB=25 C Figure 24. Junction temperature vs. output current VIN = 5 V Figure 25. Efficiency vs. output current VO = 1.8 V 85 VQFN HSOP Vo=1.8V FSW=250kHz 80 VOUT=3.3V 75 VOUT=1.8V 70 Eff [%] VOUT=1.
L7985 Application information Figure 28. Load regulation Figure 29. Line regulation 3.345 3.3500 Vin=5V Io=1A Vin=12V 3.340 3.3450 Vin=24V Io=2A 3.335 VOUT [V] VOUT [V] 3.3400 3.330 3.325 3.3350 3.3300 3.320 3.3250 3.315 3.3200 3.310 0.00 0.50 1.00 1.50 2.00 5.0 10.0 15.0 20.0 25.0 Figure 30. Load transient: from 0.4 A to 2 A 35.0 40.0 Figure 31. Soft-start VOUT 100mV/div AC coupled VOUT 500mV/div IL 500mA/div VIN=24V VOUT=3.
Application ideas L7985 7 Application ideas 7.1 Positive buck-boost The L7985 can implement the step-up/down converter with a positive output voltage. Figure 34 shows the schematic: one power MOSFET and one Schottky diode are added to the standard buck topology to provide a 12 V output voltage with input voltage from 4.5 V to 38 V. Figure 34.
L7985 Application ideas Equation 38 I OUT I SW = ------------- < 2 A 1–D where ISW is the average current in the embedded power MOSFET in the on-time. To chose the right value of the inductor and to manage transient output current, which can exceed the maximum output current calculated by Equation 38 for a short time, also the peak current in the power MOSFET must be calculated. The peak current, shown in Equation 39, must be lower than the minimum current limit (2.5 A).
Application ideas L7985 Equation 40 VOUT + 2 ⋅ V D D = -------------------------------------------------------------------------------------------------V IN – V SW – V SWE + V OUT + 2 ⋅ V D where VD is the voltage drop across the diodes, VSW and VSWE across the internal and external power MOSFET. 7.2 Inverting buck-boost The L7985 can implement the step-up/down converter with a negative output voltage.
L7985 Application ideas VCC and GND (38 V). Therefore, if the output is -5 V, the input voltage can range from 4.5 V to 33 V. As in the positive buck-boost, the maximum output current according to application conditions is shown in Figure 37. The dashed line considers a more accurate estimation of the duty cycles given by Equation 43, where power losses across diodes and the internal power MOSFET are taken into account.
Package mechanical data 8 L7985 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.
L7985 Package mechanical data Table 10. VFQFPN10 (3x3x1.08 mm) mechanical data mm Dim. Min. Typ. Max. 0.80 0.90 1.00 A1 0.02 0.05 A2 0.70 A3 0.20 A b 0.18 0.23 0.30 D 2.95 3.00 3.05 D2 2.21 2.26 2.31 E 2.95 3.00 3.05 E2 1.49 1.64 1.74 e L 0.50 0.3 0.40 M 0.75 m 0.25 0.5 Figure 38. VFQFPN10 (3x3x1.
Package mechanical data Table 11. L7985 HSOP8 mechanical data mm Dim Min. Typ. A Max. 1.70 A1 0.00 A2 1.25 b 0.31 0.51 c 0.17 0.25 D 4.80 4.90 5.00 E 5.80 6.00 6.20 E1 3.80 3.90 4.00 e 0.15 1.27 h 0.25 0.50 L 0.40 1.27 k 0.00 8.00 ccc 0.10 Figure 39.
L7985 9 Ordering information Ordering information Table 12.
Revision history 10 L7985 Revision history Table 13. 42/43 Document revision history Date Revision Changes 07-Nov-2011 1 Initial release. 01-Mar-2012 2 Section 8: Package mechanical data has been updated. 16-Oct-2012 3 In Section 5.
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