Datasheet

L6932H1.2 Components selection
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7.3 Loop Stability
The stability of the loop is affected by the zero introduced by the output capacitor. The time
constant of the zero is given by:
This zero helps to increase the phase margin of the loop until the time constant is higher
than some hundreds of nsec, depending also on the output voltage and current.
So, using very low ESR ceramic capacitors could produce oscillations at the output, in
particular when regulating high output voltages (adjustable version).
To solve this issue is sufficient to add a small capacitor (e.g. 1nF to 10nF) in parallel to the
high side resistor of the external divider, as shown in Figure 9.
Figure 9. Compensation network
The thermal resistance junction to ambient of the demoboard is approximately 34°C/W.
This mean that, considering an ambient temperature of 60°C and, a maximum junction
temperature of 150°C, the maximum power that the device can handle is 2.7W.
This means that the device is able to deliver a DC output current of 2A only with a very low
dropout.
T ESR C
OUT
×=
F
ZERP
1
2π ESR C
OUT
××
-----------------------------------------------=
L6932H1.2
R1
R2
R3
C1
C2
Vout=1.2V to 5VVin=2V to 14V
1
2
3
4
5
6
7
8
EN
Vin Vout
PGOOD
FB
GND
NC2NC1
C3
L6932H1.2
R1
R2
R3
C1
C2
Vout=1.2V to 5VVin=2V to 14V
1
2
3
4
5
6
7
8
EN
Vin Vout
PGOOD
FB
GND
NC2NC1
C3