Datasheet

L6924U Operation description
Doc ID 14716 Rev 2 15/37
Where ΔV
MOS
is given by:
Equation 3
Where,
I
LIM
= current limit of the wall adapter, and R
DS(on)
= resistance of the power MOSFET.
The difference between the programmed charge current and the adapter limit should be
high enough to minimize the R
DS(on)
value (and the power dissipation). This makes the
control loop completely unbalanced and the power element is fully turned on.
Figure 8 shows the R
DS(on)
values for different output voltages and charging currents for an
adapter current limit of 500 mA.
Figure 8. R
DS(on)
curves vs. charging current and output voltage
Neglecting the voltage drop across the charger (ΔV
MOS
) when the device operates in this
condition, its input voltage is equal to the battery one, and so a very low operating input
voltage (down to 2.5 V) is required. The power dissipated by the device during this phase is:
Equation 4
When the battery voltage approaches the final value, the charger gets back the control of
the current, reducing it. Due to this, the upstream adapter exits the current limit condition
and its output goes up to the regulated voltage V
ADP
. This is the worst case in power
dissipation:
IRV
LIM)ON(DSMOS
×=
Δ
2
LIM)on(DSCH
IRP ×=