Datasheet

Application information L6738A
28/32 Doc ID 18134 Rev 2
therefore in higher ripple voltages. For these reasons, a mix between electrolytic and MLCC
capacitors is suggested to minimize ripple as well as reduce voltage deviation in dynamic
mode.
10.3 Input capacitors
The input capacitor bank is designed considering mainly the input RMS current that
depends on the output deliverable current (I
OUT
) and the duty-cycle (D) for the regulation as
follows:
The equation reaches its maximum value, I
OUT
/2, with D = 0.5. The losses depend on the
input capacitor ESR and, in the worst case, are:
I
rms
I
OUT
D1D–()⋅⋅=
P ESR I
OUT
2⁄()
2
⋅=