Datasheet

Application details L6730 - L6730B
36/52 Doc ID 11938 Rev 3
0 dB axis with -20 dB/decade slope and a phase margin greater than 45°. To locate poles
and zeroes of the compensation networks, the following suggestions may be used:
● Modulator singularity frequencies:
● Compensation network singularity frequencies:
● Compensation network design:
– Put the gain R
5
/R
3
in order to obtain the desired converter bandwidth
–Place
ω
Z1
before the output filter resonance ω
LC
;
–Place
ω
Z2
at the output filter resonance ω
LC
;
–Place
ω
P1
at the output capacitor ESR zero ω
ESR
;
–Place
ω
P2
at one half of the switching frequency;
– Check the loop gain considering the error amplifier open loop gain.
Figure 30. Asymptotic bode plot of converter's open loop gain
CoutL
LC
⋅
=
1
ω
(13)
CoutESR
ESR
⋅
=
1
ω
(14)
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
+
⋅
⋅
=
1918
1918
5
1
1
CC
CC
R
P
ω
(15)
204
2
1
CR
P
⋅
=
ω
(16)
195
1
1
CR
Z
⋅
=
ω (17)
()
4320
2
1
RRC
Z
+⋅
=
ω
(18)
LCC
Vosc
Vin
R
R
ϖϖ ⋅
Δ
⋅=
3
5
(18)