Datasheet

L6730 - L6730B Application details
Doc ID 11938 Rev 3 35/52
6.4 Compensation network
The loop is based on a voltage mode control (Figure 29). The output voltage is regulated to
the internal/external reference voltage and scaled by the external resistor divider. The error
amplifier output V
COMP
is then compared with the oscillator triangular wave to provide a
pulse-width modulated (PWM) with an amplitude of V
IN
at the PHASE node. This waveform
is filtered by the output filter. The modulator transfer function is the small signal transfer
function of V
OUT
/V
COMP
. This function has a double pole at frequency F
LC
depending on the
L-Cout resonance and a zero at F
ESR
depending on the output capacitor’s ESR. The DC
Gain of the modulator is simply the input voltage V
IN
divided by the peak-to-peak oscillator
voltage: V
OSC
.
The compensation network consists in the internal error amplifier, the impedance networks
Z
IN
(R3, R4 and C20) and Z
FB
(R5, C18 and C19). The compensation network has to
provide a closed loop transfer function with the highest 0dB crossing frequency to have
fastest transient response (but always lower than fsw/10) and the highest gain in DC
conditions to minimize the load regulation error. A stable control loop has a gain crossing the
Figure 29. Compensation network
Z
FB
Z
IN