Datasheet

Electrical characteristics L6730 - L6730B
12/52 Doc ID 11938 Rev 3
I
FB
I.I. bias current
V
FB
= 0V
0.290 0.5 μA
Ext Ref Clamp 2.3 V
V
OFFSET
Error amplifier offset Vref = 0.6V -5 +5 mV
G
V
Open loop voltage gain Guaranteed by design 100 dB
GBWP Gain-bandwidth product Guaranteed by design 10 MHz
SR Slew-rate
COMP = 10pF
Guaranteed by design
5V/μs
Gate drivers
R
HGATE_ON
High side source resistance
V
BOOT
- V
PHASE
= 5V
1.7 Ω
R
HGATE_OFF
High side sink resistance
V
BOOT
- V
PHASE
= 5V
1.12 Ω
R
LGATE_ON
Low side source resistance
V
CCDR
= 5V
1.15 Ω
R
LGATE_OFF
Low side sink resistance
V
CCDR
= 5V
0.6 Ω
Protections
I
OCH
OCH current source
V
OCH
= 1.7V
90 100 110 μA
I
OCL
OCL current source 90 100 110 μA
OVP
Over voltage trip
(V
FB
/ V
EAREF
)
V
FB
rising
V
EAREF
= 0.6V
120 %
V
FB
falling
V
EAREF
= 0.6V
117 %
I
OSC
OSC sourcing current
V
FB
> OVP Trip V
OSC
= 3V
30 mA
Power Good
Upper threshold
(V
FB
/ V
EAREF
)
V
FB
rising
108 110 112 %
Lower threshold
(V
FB
/ V
EAREF
)
V
FB
falling
88 90 92 %
V
PGOOD
PGOOD voltage low
I
PGOOD
= -5mA
0.5 V
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min. Typ. Max. Unit