L6566B Multi-mode controller for SMPS Features ■ Selectable multi-mode operation: fixed frequency or quasi-resonant ■ On-board 700 V high-voltage start-up ■ Advanced light load management ■ Low quiescent current (< 3 mA) ■ Adaptive UVLO ■ Line feedforward for constant power capability vs mains voltage ■ Pulse-by-pulse OCP, shutdown on overload (latched or autorestart) ■ Hi-end AC-DC adapter/charger ■ Transformer saturation detection ■ LCD TV/monitor, PDP ■ Programmable frequency modulat
Contents L6566B Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 2.1 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical data . .
L6566B Contents 6 Application examples and ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
List of tables L6566B List of tables Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. 4/51 Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
L6566B List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description 1 L6566B Description The L6566B is an extremely versatile current-mode primary controller ICs, specifically designed for high-performance offline flyback converters. It is also suited for single-stage single-switch input-current-shaping converters (single-stage PFC) for applications supposed to comply with EN61000-3-2 or JEITA-MITI regulations. Both fixed-frequency (FF) and quasi-resonant (QR) operation are supported. The user can pick either of the two depending on application needs.
L6566B Description Figure 2.
Pin settings L6566B 2 Pin settings 2.1 Connections Figure 3. 2.2 HVS 1 16 AC_OK N.C. 2 15 VFF GND 3 14 SS GD 4 13 OSC Vcc 5 12 MODE/SC FMOD 6 11 ZCD CS 7 10 VREF DIS 8 9 COMP Pin description Table 1. N° 8/51 Pin connection (through top view) Pin functions Pin Function 1 HVS High-voltage start-up. The pin, able to withstand 700 V, is to be tied directly to the rectified mains voltage.
L6566B Pin settings Table 1. N° 5 6 7 8 9 10 Pin functions (continued) Pin Function Vcc Supply voltage of both the signal part of the IC and the gate driver. The internal high voltage generator charges an electrolytic capacitor connected between this pin and GND (pin 3) as long as the voltage on the pin is below the turn-on threshold of the IC, after that it is disabled and the chip is turned on. The IC is disabled as the voltage on the pin falls below the UVLO threshold.
Pin settings L6566B Table 1. N° 11 Pin functions (continued) Pin Function ZCD Transformer demagnetization sensing input for quasi-resonant operation and OVP input. The pin is externally connected to the transformer’s auxiliary winding through a resistor divider. A negative-going edge triggers MOSFET’s turn-on if QR mode is selected. A voltage exceeding 5 V shuts the IC down and brings its consumption to a lower value (OVP). Latch-off or auto-restart mode is selectable externally.
L6566B Electrical data 3 Electrical data 3.1 Maximum rating Table 2. Absolute maximum ratings Symbol Pin VHVS 1 IHVS Value Unit Voltage range (referred to ground) -0.3 to 700 V 1 Output current Self-limited VCC 5 IC supply voltage (Icc = 20 mA) Self-limited VFMOD 6 Voltage range -0.3 to 2 V Vmax 7, 8, 10, 14 Analog inputs and outputs -0.3 to 7 V Vmax 9, 15, 16 Maximum pin voltage (Ipin ≤ 1 mA) Self-limited IZCD 11 Zero current detector max.
Electrical characteristics 4 L6566B Electrical characteristics (TJ = -25 to 125°C, VCC = 12, CO = 1 nF; MODE/SC = VREF, RT = 20 kΩ from OSC to GND, unless otherwise specified). Table 4. Electrical characteristics Symbol Parameter Test condition Min Typ Max Unit Supply voltage Vcc VccOn VccOff Operating range after turn-on Turn-on threshold Turn-off threshold VCOMP > VCOMPL 10.6 23 VCOMP = VCOMPO 8 23 (1) (1) (1) V 13 14 15 VCOMP > VCOMPL 9.4 10 10.6 VCOMP = VCOMPO 7.2 7.6 8.
L6566B Table 4. Electrical characteristics Electrical characteristics (continued) Symbol Parameter Test condition Min Typ Max Unit 4.95 5 5.05 V Reference voltage VREF Output voltage (1) VREF Total variation IREF = 1 to 5 mA, Vcc = 10.6 to 23 V 4.9 5.1 V IREF Short circuit current VREF = 0 10 30 mA Sink capability in UVLO Vcc = 6 V; Isink = 0.5 mA 0.5 V VOV TJ = 25 °C; IREF = 1 mA Overvoltage threshold 0.2 5.3 5.
Electrical characteristics Table 4. L6566B Electrical characteristics (continued) Symbol Parameter Test condition Min Typ Max Unit -1 µA 300 ns 100 ns Current sense comparator ICS Input bias current tLEB Leading edge blanking td(H-L) VCSx VCS = 0 150 Delay to output Overcurrent setpoint VCOMP = VCOMPHI, VVFF = 0 V 0.92 1 1.08 VCOMP = VCOMPHI, VVFF = 1.5 V 0.45 0.5 0.55 0 0.1 1.5 1.6 VCOMP = VCOMPHI, VVFF = 3.0 V VCSdis 250 Hiccup-mode OCP level (1) 1.
L6566B Table 4. Electrical characteristics Electrical characteristics (continued) Symbol Parameter Test condition Min Typ Max Unit 5.4 5.7 6 V Zero current detector/ overvoltage protection VZCDH Upper clamp voltage IZCD = 3 mA VZCDL Lower clamp voltage IZCD = - 3 mA Arming voltage (1) positive-going edge 85 100 115 mV Triggering voltage (1) negative-going edge 30 50 70 mV VZCDA VZCDT IZCD Internal pull-up -0.
Electrical characteristics Table 4. L6566B Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. TJ = 25 °C, VSS < 2 V, VCOMP = 4 V 14 20 26 TJ = 25 °C, VSS > 2 V, VCOMP =VCOMPHi 3.5 5 6.5 Discharge current VSS > 2 V 3.5 5 6.
L6566B 5 Application information Application information The L6566B is a versatile peak-current-mode PWM controller specific for offline flyback converters. The device allows either fixed-frequency (FF) or quasi-resonant (QR) operation, selectable with the pin MODE/SC (12): forcing the voltage on the pin over 3 V (e.g. by tying it to the 5 V reference externally available at pin VREF, 10) will activate QR operation, otherwise the device will be FF-operated.
Application information L6566B If FF operation is selected: 1. FF mode from heavy to light load. The system operates exactly like a standard current mode control, at a frequency fsw determined by the externally programmable oscillator: both DCM and CCM transformer operation are possible, depending on whether the power that it processes is greater or less than: Equation 1 ⎛ Vin VR ⎞ ⎟⎟ ⎜⎜ ⎝ Vin + VR ⎠ Pin T = 2 fsw Lp 2. 2 where Vin is the input voltage to the converter, VR the reflected voltage (i.e.
L6566B Application information With reference to the timing diagram of Figure 6, when power is first applied to the converter the voltage on the bulk capacitor (Vin) builds up and, at about 80 V, the HV generator is enabled to operate (HV_EN is pulled high) so that it draws about 1 mA. This current, minus the device’s consumption, charges the bypass capacitor connected from pin Vcc (5) to ground and makes its voltage rise almost linearly. Figure 6.
Application information Figure 7. L6566B Timing diagram showing short-circuit behavior (SS pin clamped at 5 V) Short circuit occurs here Vcc (pin 5) VccON Vcc OFF Vccrestart Trep GD (pin 4) t < 0.03Trep Vcc_OK t Icharge t 0.85 mA t Figure 8. Zero current detection block, triggering block, oscillator block and related logic COMP L6566B ZCD 15 +Vin line FFWD 11 RZ1 VFF 9 BLANKING TIME 5.
L6566B 5.2 Application information Zero current detection and triggering block; oscillator block The zero current detection (ZCD) and triggering blocks switch on the external MOSFET if a negative-going edge falling below 50 mV is applied to the input (pin 11, ZCD). To do so the triggering block must be previously armed by a positive-going edge exceeding 100 mV.
Application information Figure 9.
L6566B Application information start-up, at the end of the soft-start phase the output voltage of the converter must meet the condition: Equation 4 Vout > Ns R Z1 I ZCD Naux where Ns is the turn number of the secondary winding, Naux the turn number of the auxiliary winding and IZCD the maximum pull-up current (130 μA). The operation described so far under different operating conditions for the converter is illustrated in the timing diagrams of Figure 10.
Application information 5.3 L6566B Burst-mode operation at no load or very light load When the voltage at the COMP pin (9) falls 20 mV below a threshold fixed internally at a value, VCOMPBM, depending on the selected operating mode, the L6566B is disabled with the MOSFET kept in OFF state and its consumption reduced at a lower value to minimize Vcc capacitor discharge.
L6566B Application information Figure 12. Addition of an offset to the current sense lowers the burst-mode operation threshold Vcso = Vref R R + Rc Vref 10 4 Rc L6566B R 7 3 Rs 5.4 Adaptive UVLO A major problem when optimizing a converter for minimum no-load consumption is that the voltage generated by the auxiliary winding under these conditions falls considerably as compared even to a few mA load.
Application information 5.5 L6566B PWM control block The device is specific for secondary feedback. Typically, there is a TL431 on the secondary side and an optocoupler that transfers output voltage information to the PWM control on the primary side, crossing the isolation barrier. The PWM control input (pin 9, COMP) is driven directly by the phototransistor’s collector (the emitter is grounded to GND) to modulate the duty cycle (Figure 14, left-hand side circuit).
L6566B Application information Figure 15. Externally controlled burst-mode operation by driving pin COMP: timing diagram Vcc (pin 5) Vcc ON Standby is commanded here Vcc OFF Vccrestart COMP (pin 9) t GD (pin 4) t Vcc_OK Icharge 0.85 mA Vout t t t t 5.
Application information L6566B setpoint. This is illustrated in the diagram on the left-hand side of Figure 17 on page 29: it shows the relationship between the voltage on the pin VFF and Vcsx (with the error amplifier saturated high in the attempt of keeping output voltage regulation): Equation 5 Vcsx = 1 − VVFF k = 1 − Vin 3 3 Figure 16. Typical power capability change vs input voltage in QR flyback converters 2.5 k=0 system not compensated 2 inmin@ V inlim P k 1.5 1 0.
L6566B Application information Experience shows that this value is typically lower than the real one. Once the maximum peak primary current, IPKpmax, occurring at minimum input voltage Vinmin has been found, the value of Rs can be determined from (5): Equation 7 Rs = k opt 1− 3 Vin min IPKp max Figure 17. Left: overcurrent setpoint vs VFF voltage; right: line feedforward function block Rectif ied Line Voltage Vcsx [V] 1.2 Optional for OVP settings R1 VCOMP = Upper clamp 1 0.
Application information L6566B Equation 8 k opt = 3 Td Rs Lp where Lp is the inductance of the primary winding. In case a constant maximum power capability vs. the input voltage is not required, the VFF pin can be grounded, directly or through a resistor (see Section 5.11: OVP block on page 35), hence fixing the overcurrent setpoint at 1 V, or biased at a fixed voltage through a divider from VREF to get a lower setpoint. It is possible to bypass the pin to ground with a small film capacitor (e.g.
L6566B Application information between the detected event and the oscillator, occasionally the device could stop after the third detection. This condition is latched as long as the device is supplied. While it is disabled, however, no energy is coming from the self-supply circuit; hence the voltage on the Vcc capacitor will decay and cross the UVLO threshold after some time, which clears the latch.
Application information L6566B Equation 9 β= Δfsw fm which is the parameter that the amplitude of the generated side-band harmonics depends on. The minimum frequency fsw_min (occurring on the peak of the triangle) and the maximum frequency fsw_max (occurring on the valley of the triangle) will be symmetrically placed around the centre value fsw, so that: Equation 10 fsw _ min = fsw − 21 Δfsw ; fsw _ max = fsw + 21 Δfsw Then, RT will be found from (5) (see Section 5.
L6566B Application information This function is useful to implement a latched overtemperature protection very easily by biasing the pin with a divider from VREF, where the upper resistor is an NTC physically located close to a heating element like the MOSFET, or the transformer. The DIS pin is a high impedance input, thus it is prone to pick up noise, which might give origin to undesired latch-off of the device. It is possible to bypass the pin to ground with a small film capacitor (e.g.
Application information L6566B The soft-start pin is also invoked whenever the control voltage (COMP) saturates high, which reveals an open-loop condition for the feedback system. This condition very often occurs at start-up, but may be also caused by either a control loop failure or a converter overload/short circuit. A control loop failure results in an output overvoltage that is handled by the OVP function of the L6566B (see next section).
L6566B 5.11 Application information OVP block The OVP function of the L6566B monitors the voltage on the ZCD pin (11) in MOSFET’s OFF-time, during which the voltage generated by the auxiliary winding tracks converter’s output voltage. If the voltage on the pin exceeds an internal 5 V reference, a comparator is triggered, an overvoltage condition is assumed and the device is shut down. An internal current generator is activated that sources 1 mA out of the VFF pin (15).
Application information L6566B Figure 23. OVP function: timing diagram GD (pin 4) t Vaux 0 ZCD (pin 11) t 5V t COUT 2 µs STROBE t 0.
L6566B Application information Equation 15 D + TBLANK 2 fsw ≤ 1 where TBLANK2 = 2 µs; this is also illustrated in the diagram of Figure 24. Figure 24. Maximum allowed duty cycle vs switching frequency for correct OVP detection 0.8 0.725 0.7 0.6 Dmax 0.5 0.4 0.3 0.2 4 5 .10 5 1 . 10 5 1.5 . 10 5 2 . 10 2.5 .10 5 5 3 . 10 3.5 .10 5 5 4 . 10 fsw [Hz] 5.
Application information L6566B Figure 25. Brownout protection: internal block diagram and timing diagram Sensed voltage VsenON VsenOFF VAC_OK (pin 16) t 0.485V 0.45V Sensed voltage t Vcc L6566B AC_FAIL 5 t IHYS RH 15 µA AC_OK 16 15 µA RL 0.485V 0.
L6566B Application information Figure 26.
Application information 5.13 L6566B Slope compensation The pin MODE/SC (12), when not connected to VREF, provides a voltage ramp during MOSFET’s ON-time synchronous to that of the internal oscillator sawtooth, with 0.8 mA minimum current capability. This ramp is intended for implementing additive slope compensation on current sense.
L6566B 5.14 Application information Summary of L6566B power management functions It has been seen that the device is provided with a number of power management functions: multiple operating mode upon loading conditions and protection functions. To help the designer familiarize with these functions, in the following tables all of theme are summarized with their respective activation mechanism and the resulting status of the most important pins.
Application information Table 6. Protection OVP L6566B protections Description Caused by Vcc IC Iq VREF IC restart behavior (mA) (V) (V) SS VCOMP OSC (V) (V) FMOD VFF VZCD>VZCDt h for 4 Auto consecutive Output restart(1) overvoltage switching protection cycles 5 2.2 5(6) unchanged (6) 0 0 0 unchanged VFF > VFFlatch Latched 13.5 0.33 0 0 0 0 0 0 Auto restart(2) 5 1.46 5(6) 0 0 unchanged Latched 13.5 0.33 0 0 0 0 Auto restart 5 1.
L6566B Table 6. Application information L6566B protections (continued) Protection Description Caused by Shutdown2 Shutdown by VCOMP low VCOMP < VCOMPOFF ADAPTIVE UVLO Shutdown by Vcc going below Vccoff (lowering of Vccoff threshold at light load) Vcc < 9.4V (VCOMP > VCOMPL) Vcc < 7.2V (VCOMP > VCOMPO) Vcc IC Iq VREF IC restart behavior (mA) (V) (V) SS VCOMP OSC (V) (V) FMOD VFF Latched 10 0.33 0 0 0 0 0 0 Auto restart 5V 0.18 mA 0 0 0 0 0 0 1.
Application examples and ideas 6 L6566B Application examples and ideas Figure 28. Typical low-cost application schematic F1 fuse Vin 88 to 264 Vac NTC1 B1 CY1 CX1 T1 CX2 C1 Lx R1 C2 CY2 D4 Vout D1 C8A,B R2 R3 470k D2 C3 AC_OK FMOD DIS 6 1 C7 2.
L6566B Application examples and ideas Figure 30. Typical full-feature application schematic (FF operation) F1 fuse Vin 88 to 264 Vac NTC1 B1 CY1 CX1 T1 CX2 C1 Lx R1 C2 D4 CY2 Vout D1 C8A,B R2 R16 MODE/SC AC_OK 1 DIS 15 L6566B 6 VREF 13 FMOD R11 R7 Q1 D3 1N4148 14 OSC 9 SS IC3 PC817A CS 7 8 NTC2 R12 R4 GD 4 IC1 10 R13 R3 ZCD 11 5 16 VFF C7 2.
Application examples and ideas L6566B Figure 31. Frequency foldback at light load (FF operation) R1 MODE/SC R2 Vref 12 10 COMP L6566B 9 BC857C 13 OSC RT Figure 32.
L6566B 7 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.
Package mechanical data Table 8. L6566B SO16N mechanical data mm. inch Dim. Min Typ A a1 Min Typ 1.75 0.1 Max 0.069 0.25 a2 0.004 0.009 1.6 0.063 b 0.35 0.46 0.014 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 c1 0.020 45° (typ.) D 9.8 10 0.386 0.394 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.150 0.157 G 4.60 5.30 0.181 0.208 L 0.4 1.27 0.150 0.050 M S Figure 33. Package dimensions 48/51 Max 0.62 0.024 8°(max.
L6566B 8 Order codes Order codes Table 9.
Revision history 9 L6566B Revision history Table 10. 50/51 Document revision history Date Revision Changes 20-Aug-2007 1 First release 29-May-2008 2 Updated Figure 29 on page 44, Table 2 on page 11 02-Dec-2008 3 Updated Figure 1 on page 1 and Section 5.
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