Datasheet
Table Of Contents
- Figure 1. Block diagram
- 1 Description
- 2 Maximum ratings
- 3 Pin connection
- 4 Electrical characteristics
- 5 Typical electrical performance
- Figure 3. IC consumption vs. VCC
- Figure 4. IC consumption vs. TJ
- Figure 5. VCC Zener voltage vs. TJ
- Figure 6. Startup and UVLO vs. TJ
- Figure 7. Feedback reference vs. TJ
- Figure 8. E/A output clamp levels vs. TJ
- Figure 9. UVLO saturation vs. TJ
- Figure 10. OVP levels vs. TJ
- Figure 11. Inductor saturation threshold vs. TJ
- Figure 12. Vcs clamp vs. TJ
- Figure 13. ZCD sink/source capability vs. TJ
- Figure 14. ZCD clamp level vs. TJ
- Figure 15. R discharge vs. TJ
- Figure 16. Line drop detection threshold vs. TJ
- Figure 17. VMULTpk - VVFF dropout vs. TJ
- Figure 18. PFC_OK threshold vs. TJ
- Figure 19. PFC_OK FFD threshold vs. TJ
- Figure 20. Multiplier characteristics at VFF = 1 V
- Figure 21. Multiplier characteristics at VFF = 3 V
- Figure 22. Multiplier gain vs. TJ
- Figure 23. Gate drive clamp vs. TJ
- Figure 24. Gate drive output saturation vs. TJ
- Figure 25. Delay to output vs. TJ
- Figure 26. Start-up timer period vs. TJ
- 6 Application information
- 7 Application examples and ideas
- Figure 34. Demonstration board EVL6564-100W, wide-range mains: electrical schematic
- Figure 35. L6564 100W TM PFC: compliance to EN61000-3-2 standard
- Figure 36. L6564 100W TM PFC: compliance to JEITA-MITI standard
- Figure 37. L6564 100 W TM PFC: input current waveform at 230 - 50 Hz - 100 W load
- Figure 38. L6564 100W TM PFC: input current waveform at 100 V - 50 Hz - 100 W load
- 8 Package mechanical data
- 9 Order codes
- 10 Revision history
DocID16202 Rev 5 25/33
L6564 Application information
33
6.6 Power management/housekeeping functions
A communication line with the control IC of the cascaded dc-dc converter can be
established via the disable function included in the PFC_OK pin (see
Section 6.2: Feedback
failure protection (FFP) on page 19
for more details). Typically this line is used to allow the
PWM controller of the cascaded dc-dc converter to shut down the L6564 device in case of
light load and to minimize the no-load input consumption. Should the residual consumption
of the chip be an issue, it is also possible to cut down the supply voltage. Interface circuits
like those are shown in
Figure 32. Needless to say, this operation assumes that the
cascaded dc-dc converter stage works as the master and the PFC stage as the slave or, in
other words, that the dc-dc stage starts first, it powers both controllers and enables/disables
the operation of the PFC stage.
Figure 33. Interface circuits that let dc-dc converter's controller IC disable the L6564
Another function available is the brownout protection which is basically a not-latched
shutdown function that is activated when a condition of mains under voltage is detected.
This condition may cause overheating of the primary power section due to an excess of
RMS current. Brownout can also cause the PFC preregulator to work open loop and this
could be dangerous to the PFC stage itself and the downstream converter, should the input
voltage return abruptly to its rated value. Another problem is the spurious restarts that may
occur during converter power down and that cause the output voltage of the converter not to
decay to zero monotonically. For these reasons it is usually preferable to shutdown the unit
in case of brownout. Brownout threshold is internally fixed at 0.8 V and is sensed on pin V
FF
(5) during the voltage falling and 80 mV threshold hysteresis prevents from rebounding at
input voltage turn off. In
Table 5 it is possible to find a summary of all of the above
mentioned working conditions that cause the device to stop operating.
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